odn_sclk_table   3762 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c 	struct phm_odn_clock_levels *odn_sclk_table = &(odn_table->odn_core_clock_dpm_levels);
odn_sclk_table   3770 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c 			dpm_table->sclk_table.dpm_levels[count].enabled = odn_sclk_table->entries[count].enabled;
odn_sclk_table   3771 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c 			dpm_table->sclk_table.dpm_levels[count].value = odn_sclk_table->entries[count].clock;
odn_sclk_table   4449 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c 	struct phm_odn_clock_levels *odn_sclk_table = &(odn_table->odn_core_clock_dpm_levels);
odn_sclk_table   4506 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c 			for (i = 0; i < odn_sclk_table->num_of_pl; i++)
odn_sclk_table   4508 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c 					i, odn_sclk_table->entries[i].clock/100,
odn_sclk_table   4509 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c 					odn_sclk_table->entries[i].vddc);