odn_mclk_table   3763 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c 	struct phm_odn_clock_levels *odn_mclk_table = &(odn_table->odn_memory_clock_dpm_levels);
odn_mclk_table   3777 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c 			dpm_table->mclk_table.dpm_levels[count].enabled = odn_mclk_table->entries[count].enabled;
odn_mclk_table   3778 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c 			dpm_table->mclk_table.dpm_levels[count].value = odn_mclk_table->entries[count].clock;
odn_mclk_table   4450 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c 	struct phm_odn_clock_levels *odn_mclk_table = &(odn_table->odn_memory_clock_dpm_levels);
odn_mclk_table   4515 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c 			for (i = 0; i < odn_mclk_table->num_of_pl; i++)
odn_mclk_table   4517 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c 					i, odn_mclk_table->entries[i].clock/100,
odn_mclk_table   4518 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c 					odn_mclk_table->entries[i].vddc);