octeon_irq_gpio_chip 1219 arch/mips/cavium-octeon/octeon-irq.c static struct irq_chip *octeon_irq_gpio_chip;
octeon_irq_gpio_chip 1273 arch/mips/cavium-octeon/octeon-irq.c 				       octeon_irq_gpio_chip, handle_level_irq);
octeon_irq_gpio_chip 1482 arch/mips/cavium-octeon/octeon-irq.c 		octeon_irq_gpio_chip = &octeon_irq_chip_ciu_gpio_v2;
octeon_irq_gpio_chip 1488 arch/mips/cavium-octeon/octeon-irq.c 		octeon_irq_gpio_chip = &octeon_irq_chip_ciu_gpio;
octeon_irq_gpio_chip 2044 arch/mips/cavium-octeon/octeon-irq.c 	octeon_irq_gpio_chip = &octeon_irq_chip_ciu2_gpio;