ochip 51 arch/arm/plat-orion/gpio.c static void __iomem *GPIO_OUT(struct orion_gpio_chip *ochip) ochip 53 arch/arm/plat-orion/gpio.c return ochip->base + GPIO_OUT_OFF; ochip 56 arch/arm/plat-orion/gpio.c static void __iomem *GPIO_IO_CONF(struct orion_gpio_chip *ochip) ochip 58 arch/arm/plat-orion/gpio.c return ochip->base + GPIO_IO_CONF_OFF; ochip 61 arch/arm/plat-orion/gpio.c static void __iomem *GPIO_BLINK_EN(struct orion_gpio_chip *ochip) ochip 63 arch/arm/plat-orion/gpio.c return ochip->base + GPIO_BLINK_EN_OFF; ochip 66 arch/arm/plat-orion/gpio.c static void __iomem *GPIO_IN_POL(struct orion_gpio_chip *ochip) ochip 68 arch/arm/plat-orion/gpio.c return ochip->base + GPIO_IN_POL_OFF; ochip 71 arch/arm/plat-orion/gpio.c static void __iomem *GPIO_DATA_IN(struct orion_gpio_chip *ochip) ochip 73 arch/arm/plat-orion/gpio.c return ochip->base + GPIO_DATA_IN_OFF; ochip 76 arch/arm/plat-orion/gpio.c static void __iomem *GPIO_EDGE_CAUSE(struct orion_gpio_chip *ochip) ochip 78 arch/arm/plat-orion/gpio.c return ochip->base + GPIO_EDGE_CAUSE_OFF; ochip 81 arch/arm/plat-orion/gpio.c static void __iomem *GPIO_EDGE_MASK(struct orion_gpio_chip *ochip) ochip 83 arch/arm/plat-orion/gpio.c return ochip->base + ochip->mask_offset + GPIO_EDGE_MASK_OFF; ochip 86 arch/arm/plat-orion/gpio.c static void __iomem *GPIO_LEVEL_MASK(struct orion_gpio_chip *ochip) ochip 88 arch/arm/plat-orion/gpio.c return ochip->base + ochip->mask_offset + GPIO_LEVEL_MASK_OFF; ochip 96 arch/arm/plat-orion/gpio.c __set_direction(struct orion_gpio_chip *ochip, unsigned pin, int input) ochip 100 arch/arm/plat-orion/gpio.c u = readl(GPIO_IO_CONF(ochip)); ochip 105 arch/arm/plat-orion/gpio.c writel(u, GPIO_IO_CONF(ochip)); ochip 108 arch/arm/plat-orion/gpio.c static void __set_level(struct orion_gpio_chip *ochip, unsigned pin, int high) ochip 112 arch/arm/plat-orion/gpio.c u = readl(GPIO_OUT(ochip)); ochip 117 arch/arm/plat-orion/gpio.c writel(u, GPIO_OUT(ochip)); ochip 121 arch/arm/plat-orion/gpio.c __set_blinking(struct orion_gpio_chip *ochip, unsigned pin, int blink) ochip 125 arch/arm/plat-orion/gpio.c u = readl(GPIO_BLINK_EN(ochip)); ochip 130 arch/arm/plat-orion/gpio.c writel(u, GPIO_BLINK_EN(ochip)); ochip 134 arch/arm/plat-orion/gpio.c orion_gpio_is_valid(struct orion_gpio_chip *ochip, unsigned pin, int mode) ochip 136 arch/arm/plat-orion/gpio.c if (pin >= ochip->chip.ngpio) ochip 139 arch/arm/plat-orion/gpio.c if ((mode & GPIO_INPUT_OK) && !test_bit(pin, &ochip->valid_input)) ochip 142 arch/arm/plat-orion/gpio.c if ((mode & GPIO_OUTPUT_OK) && !test_bit(pin, &ochip->valid_output)) ochip 157 arch/arm/plat-orion/gpio.c struct orion_gpio_chip *ochip = gpiochip_get_data(chip); ochip 159 arch/arm/plat-orion/gpio.c if (orion_gpio_is_valid(ochip, pin, GPIO_INPUT_OK) || ochip 160 arch/arm/plat-orion/gpio.c orion_gpio_is_valid(ochip, pin, GPIO_OUTPUT_OK)) ochip 168 arch/arm/plat-orion/gpio.c struct orion_gpio_chip *ochip = gpiochip_get_data(chip); ochip 171 arch/arm/plat-orion/gpio.c if (!orion_gpio_is_valid(ochip, pin, GPIO_INPUT_OK)) ochip 174 arch/arm/plat-orion/gpio.c spin_lock_irqsave(&ochip->lock, flags); ochip 175 arch/arm/plat-orion/gpio.c __set_direction(ochip, pin, 1); ochip 176 arch/arm/plat-orion/gpio.c spin_unlock_irqrestore(&ochip->lock, flags); ochip 183 arch/arm/plat-orion/gpio.c struct orion_gpio_chip *ochip = gpiochip_get_data(chip); ochip 186 arch/arm/plat-orion/gpio.c if (readl(GPIO_IO_CONF(ochip)) & (1 << pin)) { ochip 187 arch/arm/plat-orion/gpio.c val = readl(GPIO_DATA_IN(ochip)) ^ readl(GPIO_IN_POL(ochip)); ochip 189 arch/arm/plat-orion/gpio.c val = readl(GPIO_OUT(ochip)); ochip 198 arch/arm/plat-orion/gpio.c struct orion_gpio_chip *ochip = gpiochip_get_data(chip); ochip 201 arch/arm/plat-orion/gpio.c if (!orion_gpio_is_valid(ochip, pin, GPIO_OUTPUT_OK)) ochip 204 arch/arm/plat-orion/gpio.c spin_lock_irqsave(&ochip->lock, flags); ochip 205 arch/arm/plat-orion/gpio.c __set_blinking(ochip, pin, 0); ochip 206 arch/arm/plat-orion/gpio.c __set_level(ochip, pin, value); ochip 207 arch/arm/plat-orion/gpio.c __set_direction(ochip, pin, 0); ochip 208 arch/arm/plat-orion/gpio.c spin_unlock_irqrestore(&ochip->lock, flags); ochip 215 arch/arm/plat-orion/gpio.c struct orion_gpio_chip *ochip = gpiochip_get_data(chip); ochip 218 arch/arm/plat-orion/gpio.c spin_lock_irqsave(&ochip->lock, flags); ochip 219 arch/arm/plat-orion/gpio.c __set_level(ochip, pin, value); ochip 220 arch/arm/plat-orion/gpio.c spin_unlock_irqrestore(&ochip->lock, flags); ochip 225 arch/arm/plat-orion/gpio.c struct orion_gpio_chip *ochip = gpiochip_get_data(chip); ochip 227 arch/arm/plat-orion/gpio.c return irq_create_mapping(ochip->domain, ochip 228 arch/arm/plat-orion/gpio.c ochip->secondary_irq_base + pin); ochip 239 arch/arm/plat-orion/gpio.c struct orion_gpio_chip *ochip = orion_gpio_chips + i; ochip 240 arch/arm/plat-orion/gpio.c struct gpio_chip *chip = &ochip->chip; ochip 243 arch/arm/plat-orion/gpio.c return ochip; ochip 251 arch/arm/plat-orion/gpio.c struct orion_gpio_chip *ochip = orion_gpio_chip_find(pin); ochip 253 arch/arm/plat-orion/gpio.c if (ochip == NULL) ochip 256 arch/arm/plat-orion/gpio.c pin -= ochip->chip.base; ochip 259 arch/arm/plat-orion/gpio.c __set_level(ochip, pin, 0); ochip 260 arch/arm/plat-orion/gpio.c __set_direction(ochip, pin, 0); ochip 265 arch/arm/plat-orion/gpio.c struct orion_gpio_chip *ochip = orion_gpio_chip_find(pin); ochip 267 arch/arm/plat-orion/gpio.c if (ochip == NULL) ochip 270 arch/arm/plat-orion/gpio.c pin -= ochip->chip.base; ochip 276 arch/arm/plat-orion/gpio.c __set_bit(pin, &ochip->valid_input); ochip 278 arch/arm/plat-orion/gpio.c __clear_bit(pin, &ochip->valid_input); ochip 281 arch/arm/plat-orion/gpio.c __set_bit(pin, &ochip->valid_output); ochip 283 arch/arm/plat-orion/gpio.c __clear_bit(pin, &ochip->valid_output); ochip 288 arch/arm/plat-orion/gpio.c struct orion_gpio_chip *ochip = orion_gpio_chip_find(pin); ochip 291 arch/arm/plat-orion/gpio.c if (ochip == NULL) ochip 294 arch/arm/plat-orion/gpio.c spin_lock_irqsave(&ochip->lock, flags); ochip 295 arch/arm/plat-orion/gpio.c __set_level(ochip, pin & 31, 0); ochip 296 arch/arm/plat-orion/gpio.c __set_blinking(ochip, pin & 31, blink); ochip 297 arch/arm/plat-orion/gpio.c spin_unlock_irqrestore(&ochip->lock, flags); ochip 355 arch/arm/plat-orion/gpio.c struct orion_gpio_chip *ochip = gc->private; ochip 359 arch/arm/plat-orion/gpio.c pin = d->hwirq - ochip->secondary_irq_base; ochip 361 arch/arm/plat-orion/gpio.c u = readl(GPIO_IO_CONF(ochip)) & (1 << pin); ochip 379 arch/arm/plat-orion/gpio.c u = readl(GPIO_IN_POL(ochip)); ochip 381 arch/arm/plat-orion/gpio.c writel(u, GPIO_IN_POL(ochip)); ochip 383 arch/arm/plat-orion/gpio.c u = readl(GPIO_IN_POL(ochip)); ochip 385 arch/arm/plat-orion/gpio.c writel(u, GPIO_IN_POL(ochip)); ochip 389 arch/arm/plat-orion/gpio.c v = readl(GPIO_IN_POL(ochip)) ^ readl(GPIO_DATA_IN(ochip)); ochip 394 arch/arm/plat-orion/gpio.c u = readl(GPIO_IN_POL(ochip)); ochip 399 arch/arm/plat-orion/gpio.c writel(u, GPIO_IN_POL(ochip)); ochip 406 arch/arm/plat-orion/gpio.c struct orion_gpio_chip *ochip = irq_desc_get_handler_data(desc); ochip 410 arch/arm/plat-orion/gpio.c if (ochip == NULL) ochip 413 arch/arm/plat-orion/gpio.c cause = readl(GPIO_DATA_IN(ochip)) & readl(GPIO_LEVEL_MASK(ochip)); ochip 414 arch/arm/plat-orion/gpio.c cause |= readl(GPIO_EDGE_CAUSE(ochip)) & readl(GPIO_EDGE_MASK(ochip)); ochip 416 arch/arm/plat-orion/gpio.c for (i = 0; i < ochip->chip.ngpio; i++) { ochip 419 arch/arm/plat-orion/gpio.c irq = ochip->secondary_irq_base + i; ochip 429 arch/arm/plat-orion/gpio.c polarity = readl(GPIO_IN_POL(ochip)); ochip 431 arch/arm/plat-orion/gpio.c writel(polarity, GPIO_IN_POL(ochip)); ochip 443 arch/arm/plat-orion/gpio.c struct orion_gpio_chip *ochip = gpiochip_get_data(chip); ochip 447 arch/arm/plat-orion/gpio.c out = readl_relaxed(GPIO_OUT(ochip)); ochip 448 arch/arm/plat-orion/gpio.c io_conf = readl_relaxed(GPIO_IO_CONF(ochip)); ochip 449 arch/arm/plat-orion/gpio.c blink = readl_relaxed(GPIO_BLINK_EN(ochip)); ochip 450 arch/arm/plat-orion/gpio.c in_pol = readl_relaxed(GPIO_IN_POL(ochip)); ochip 451 arch/arm/plat-orion/gpio.c data_in = readl_relaxed(GPIO_DATA_IN(ochip)); ochip 452 arch/arm/plat-orion/gpio.c cause = readl_relaxed(GPIO_EDGE_CAUSE(ochip)); ochip 453 arch/arm/plat-orion/gpio.c edg_msk = readl_relaxed(GPIO_EDGE_MASK(ochip)); ochip 454 arch/arm/plat-orion/gpio.c lvl_msk = readl_relaxed(GPIO_LEVEL_MASK(ochip)); ochip 529 arch/arm/plat-orion/gpio.c struct orion_gpio_chip *ochip; ochip 541 arch/arm/plat-orion/gpio.c ochip = orion_gpio_chips + orion_gpio_chip_count; ochip 542 arch/arm/plat-orion/gpio.c ochip->chip.label = kstrdup(gc_label, GFP_KERNEL); ochip 543 arch/arm/plat-orion/gpio.c ochip->chip.request = orion_gpio_request; ochip 544 arch/arm/plat-orion/gpio.c ochip->chip.direction_input = orion_gpio_direction_input; ochip 545 arch/arm/plat-orion/gpio.c ochip->chip.get = orion_gpio_get; ochip 546 arch/arm/plat-orion/gpio.c ochip->chip.direction_output = orion_gpio_direction_output; ochip 547 arch/arm/plat-orion/gpio.c ochip->chip.set = orion_gpio_set; ochip 548 arch/arm/plat-orion/gpio.c ochip->chip.to_irq = orion_gpio_to_irq; ochip 549 arch/arm/plat-orion/gpio.c ochip->chip.base = gpio_base; ochip 550 arch/arm/plat-orion/gpio.c ochip->chip.ngpio = ngpio; ochip 551 arch/arm/plat-orion/gpio.c ochip->chip.can_sleep = 0; ochip 553 arch/arm/plat-orion/gpio.c ochip->chip.of_node = np; ochip 555 arch/arm/plat-orion/gpio.c ochip->chip.dbg_show = orion_gpio_dbg_show; ochip 557 arch/arm/plat-orion/gpio.c spin_lock_init(&ochip->lock); ochip 558 arch/arm/plat-orion/gpio.c ochip->base = (void __iomem *)base; ochip 559 arch/arm/plat-orion/gpio.c ochip->valid_input = 0; ochip 560 arch/arm/plat-orion/gpio.c ochip->valid_output = 0; ochip 561 arch/arm/plat-orion/gpio.c ochip->mask_offset = mask_offset; ochip 562 arch/arm/plat-orion/gpio.c ochip->secondary_irq_base = secondary_irq_base; ochip 564 arch/arm/plat-orion/gpio.c gpiochip_add_data(&ochip->chip, ochip); ochip 569 arch/arm/plat-orion/gpio.c writel(0, GPIO_EDGE_CAUSE(ochip)); ochip 570 arch/arm/plat-orion/gpio.c writel(0, GPIO_EDGE_MASK(ochip)); ochip 571 arch/arm/plat-orion/gpio.c writel(0, GPIO_LEVEL_MASK(ochip)); ochip 581 arch/arm/plat-orion/gpio.c ochip); ochip 587 arch/arm/plat-orion/gpio.c ochip->base, handle_level_irq); ochip 588 arch/arm/plat-orion/gpio.c gc->private = ochip; ochip 590 arch/arm/plat-orion/gpio.c ct->regs.mask = ochip->mask_offset + GPIO_LEVEL_MASK_OFF; ochip 595 arch/arm/plat-orion/gpio.c ct->chip.name = ochip->chip.label; ochip 598 arch/arm/plat-orion/gpio.c ct->regs.mask = ochip->mask_offset + GPIO_EDGE_MASK_OFF; ochip 606 arch/arm/plat-orion/gpio.c ct->chip.name = ochip->chip.label; ochip 612 arch/arm/plat-orion/gpio.c ochip->domain = irq_domain_add_legacy(np, ochip 613 arch/arm/plat-orion/gpio.c ochip->chip.ngpio, ochip 614 arch/arm/plat-orion/gpio.c ochip->secondary_irq_base, ochip 615 arch/arm/plat-orion/gpio.c ochip->secondary_irq_base, ochip 617 arch/arm/plat-orion/gpio.c ochip); ochip 618 arch/arm/plat-orion/gpio.c if (!ochip->domain) ochip 620 arch/arm/plat-orion/gpio.c ochip->chip.label);