PHYPLL_PIXEL_RATE_CNTL  177 drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.c 		REG_UPDATE_2(PHYPLL_PIXEL_RATE_CNTL[tg_inst],
PHYPLL_PIXEL_RATE_CNTL  191 drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.c 		if (REG(PHYPLL_PIXEL_RATE_CNTL[tg_inst]))
PHYPLL_PIXEL_RATE_CNTL  192 drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.c 			REG_UPDATE(PHYPLL_PIXEL_RATE_CNTL[tg_inst],
PHYPLL_PIXEL_RATE_CNTL   67 drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h 	SRII(PHYPLL_PIXEL_RATE_CNTL, blk, inst)
PHYPLL_PIXEL_RATE_CNTL   78 drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h 	SRII(PHYPLL_PIXEL_RATE_CNTL, blk, 0), \
PHYPLL_PIXEL_RATE_CNTL   79 drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h 	SRII(PHYPLL_PIXEL_RATE_CNTL, blk, 1), \
PHYPLL_PIXEL_RATE_CNTL   80 drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h 	SRII(PHYPLL_PIXEL_RATE_CNTL, blk, 2), \
PHYPLL_PIXEL_RATE_CNTL   81 drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h 	SRII(PHYPLL_PIXEL_RATE_CNTL, blk, 3), \
PHYPLL_PIXEL_RATE_CNTL   82 drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h 	SRII(PHYPLL_PIXEL_RATE_CNTL, blk, 4), \
PHYPLL_PIXEL_RATE_CNTL   83 drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h 	SRII(PHYPLL_PIXEL_RATE_CNTL, blk, 5)
PHYPLL_PIXEL_RATE_CNTL  348 drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h 	uint32_t PHYPLL_PIXEL_RATE_CNTL[6];
PHYPLL_PIXEL_RATE_CNTL  469 drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h 	HWS_SF1(blk, PHYPLL_PIXEL_RATE_CNTL, PHYPLL_PIXEL_RATE_SOURCE, mask_sh),\
PHYPLL_PIXEL_RATE_CNTL  470 drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h 	HWS_SF1(blk, PHYPLL_PIXEL_RATE_CNTL, PIXEL_RATE_PLL_SOURCE, mask_sh)
PHYPLL_PIXEL_RATE_CNTL  524 drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h 	HWS_SF1(OTG0_, PHYPLL_PIXEL_RATE_CNTL, PHYPLL_PIXEL_RATE_SOURCE, mask_sh), \
PHYPLL_PIXEL_RATE_CNTL  531 drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h 	HWS_SF1(OTG0_, PHYPLL_PIXEL_RATE_CNTL, PIXEL_RATE_PLL_SOURCE, mask_sh), \