PHYPLLA_PIXCLK_RESYNC_CNTL   55 drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.h 	CS_SF(PHYPLLA_PIXCLK_RESYNC_CNTL, PHYPLLA_DCCG_DEEP_COLOR_CNTL, mask_sh),\
PHYPLLA_PIXCLK_RESYNC_CNTL   56 drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.h 	CS_SF(PHYPLLA_PIXCLK_RESYNC_CNTL, PHYPLLA_PIXCLK_DOUBLE_RATE_ENABLE, mask_sh)
PHYPLLA_PIXCLK_RESYNC_CNTL  102 drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.h 	CS_SF(PHYPLLA_PIXCLK_RESYNC_CNTL, PHYPLLA_DCCG_DEEP_COLOR_CNTL, mask_sh),\
PHYPLLA_PIXCLK_RESYNC_CNTL  126 drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.h 	CS_SF(PHYPLLA_PIXCLK_RESYNC_CNTL, PHYPLLA_DCCG_DEEP_COLOR_CNTL, mask_sh),\