nv_encoder        257 drivers/gpu/drm/nouveau/dispnv04/crtc.c 		struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder);
nv_encoder        260 drivers/gpu/drm/nouveau/dispnv04/crtc.c 		    (nv_encoder->dcb->type == DCB_OUTPUT_LVDS ||
nv_encoder        261 drivers/gpu/drm/nouveau/dispnv04/crtc.c 		     nv_encoder->dcb->type == DCB_OUTPUT_TMDS))
nv_encoder        469 drivers/gpu/drm/nouveau/dispnv04/crtc.c 		struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder);
nv_encoder        475 drivers/gpu/drm/nouveau/dispnv04/crtc.c 		if (nv_encoder->dcb->type == DCB_OUTPUT_LVDS)
nv_encoder        477 drivers/gpu/drm/nouveau/dispnv04/crtc.c 		if (nv_encoder->dcb->type == DCB_OUTPUT_TV)
nv_encoder        479 drivers/gpu/drm/nouveau/dispnv04/crtc.c 		if (nv_encoder->dcb->type == DCB_OUTPUT_TMDS)
nv_encoder        481 drivers/gpu/drm/nouveau/dispnv04/crtc.c 		if (nv_encoder->dcb->location != DCB_LOC_ON_CHIP && digital)
nv_encoder        413 drivers/gpu/drm/nouveau/dispnv04/dac.c 	struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder);
nv_encoder        421 drivers/gpu/drm/nouveau/dispnv04/dac.c 		 nouveau_encoder_connector_get(nv_encoder)->base.name,
nv_encoder        422 drivers/gpu/drm/nouveau/dispnv04/dac.c 		 nv_crtc->index, '@' + ffs(nv_encoder->dcb->or));
nv_encoder        461 drivers/gpu/drm/nouveau/dispnv04/dac.c 	struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder);
nv_encoder        464 drivers/gpu/drm/nouveau/dispnv04/dac.c 	if (nv_encoder->last_dpms == mode)
nv_encoder        466 drivers/gpu/drm/nouveau/dispnv04/dac.c 	nv_encoder->last_dpms = mode;
nv_encoder        469 drivers/gpu/drm/nouveau/dispnv04/dac.c 		 mode, nv_encoder->dcb->index);
nv_encoder        476 drivers/gpu/drm/nouveau/dispnv04/dac.c 	struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder);
nv_encoder        480 drivers/gpu/drm/nouveau/dispnv04/dac.c 		nv_encoder->restore.output = NVReadRAMDAC(dev, 0, NV_PRAMDAC_DACCLK +
nv_encoder        486 drivers/gpu/drm/nouveau/dispnv04/dac.c 	struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder);
nv_encoder        491 drivers/gpu/drm/nouveau/dispnv04/dac.c 			      nv_encoder->restore.output);
nv_encoder        493 drivers/gpu/drm/nouveau/dispnv04/dac.c 	nv_encoder->last_dpms = NV_DPMS_CLEARED;
nv_encoder        498 drivers/gpu/drm/nouveau/dispnv04/dac.c 	struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder);
nv_encoder        501 drivers/gpu/drm/nouveau/dispnv04/dac.c 	kfree(nv_encoder);
nv_encoder        530 drivers/gpu/drm/nouveau/dispnv04/dac.c 	struct nouveau_encoder *nv_encoder = NULL;
nv_encoder        534 drivers/gpu/drm/nouveau/dispnv04/dac.c 	nv_encoder = kzalloc(sizeof(*nv_encoder), GFP_KERNEL);
nv_encoder        535 drivers/gpu/drm/nouveau/dispnv04/dac.c 	if (!nv_encoder)
nv_encoder        538 drivers/gpu/drm/nouveau/dispnv04/dac.c 	encoder = to_drm_encoder(nv_encoder);
nv_encoder        540 drivers/gpu/drm/nouveau/dispnv04/dac.c 	nv_encoder->dcb = entry;
nv_encoder        541 drivers/gpu/drm/nouveau/dispnv04/dac.c 	nv_encoder->or = ffs(entry->or) - 1;
nv_encoder        543 drivers/gpu/drm/nouveau/dispnv04/dac.c 	nv_encoder->enc_save = nv04_dac_save;
nv_encoder        544 drivers/gpu/drm/nouveau/dispnv04/dac.c 	nv_encoder->enc_restore = nv04_dac_restore;
nv_encoder        186 drivers/gpu/drm/nouveau/dispnv04/dfp.c 	struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder);
nv_encoder        187 drivers/gpu/drm/nouveau/dispnv04/dfp.c 	struct nouveau_connector *nv_connector = nouveau_encoder_connector_get(nv_encoder);
nv_encoder        193 drivers/gpu/drm/nouveau/dispnv04/dfp.c 		nv_encoder->mode = *adjusted_mode;
nv_encoder        196 drivers/gpu/drm/nouveau/dispnv04/dfp.c 		nv_encoder->mode = *nv_connector->native_mode;
nv_encoder        204 drivers/gpu/drm/nouveau/dispnv04/dfp.c 				     struct nouveau_encoder *nv_encoder, int head)
nv_encoder        207 drivers/gpu/drm/nouveau/dispnv04/dfp.c 	uint32_t bits1618 = nv_encoder->dcb->or & DCB_OUTPUT_A ? 0x10000 : 0x40000;
nv_encoder        209 drivers/gpu/drm/nouveau/dispnv04/dfp.c 	if (nv_encoder->dcb->location != DCB_LOC_ON_CHIP)
nv_encoder        236 drivers/gpu/drm/nouveau/dispnv04/dfp.c 	if (nv_encoder->dcb->type == DCB_OUTPUT_LVDS && nv04_display(dev)->saved_reg.sel_clk & 0xf0) {
nv_encoder        246 drivers/gpu/drm/nouveau/dispnv04/dfp.c 	struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder);
nv_encoder        256 drivers/gpu/drm/nouveau/dispnv04/dfp.c 	nv04_dfp_prepare_sel_clk(dev, nv_encoder, head);
nv_encoder        261 drivers/gpu/drm/nouveau/dispnv04/dfp.c 		if (nv_encoder->dcb->location == DCB_LOC_ON_CHIP)
nv_encoder        264 drivers/gpu/drm/nouveau/dispnv04/dfp.c 			*cr_lcd |= (nv_encoder->dcb->or << 4) & 0x30;
nv_encoder        265 drivers/gpu/drm/nouveau/dispnv04/dfp.c 			if (nv_encoder->dcb->type == DCB_OUTPUT_LVDS)
nv_encoder        290 drivers/gpu/drm/nouveau/dispnv04/dfp.c 	struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder);
nv_encoder        291 drivers/gpu/drm/nouveau/dispnv04/dfp.c 	struct drm_display_mode *output_mode = &nv_encoder->mode;
nv_encoder        341 drivers/gpu/drm/nouveau/dispnv04/dfp.c 	if (nv_encoder->dcb->location != DCB_LOC_ON_CHIP &&
nv_encoder        344 drivers/gpu/drm/nouveau/dispnv04/dfp.c 	if (nv_encoder->dcb->type == DCB_OUTPUT_LVDS) {
nv_encoder        451 drivers/gpu/drm/nouveau/dispnv04/dfp.c 	struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder);
nv_encoder        452 drivers/gpu/drm/nouveau/dispnv04/dfp.c 	struct dcb_output *dcbe = nv_encoder->dcb;
nv_encoder        457 drivers/gpu/drm/nouveau/dispnv04/dfp.c 		run_tmds_table(dev, dcbe, head, nv_encoder->mode.clock);
nv_encoder        459 drivers/gpu/drm/nouveau/dispnv04/dfp.c 		call_lvds_script(dev, dcbe, head, LVDS_RESET, nv_encoder->mode.clock);
nv_encoder        476 drivers/gpu/drm/nouveau/dispnv04/dfp.c 			slave_encoder, &nv_encoder->mode, &nv_encoder->mode);
nv_encoder        481 drivers/gpu/drm/nouveau/dispnv04/dfp.c 		 nouveau_encoder_connector_get(nv_encoder)->base.name,
nv_encoder        482 drivers/gpu/drm/nouveau/dispnv04/dfp.c 		 nv_crtc->index, '@' + ffs(nv_encoder->dcb->or));
nv_encoder        517 drivers/gpu/drm/nouveau/dispnv04/dfp.c 	struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder);
nv_encoder        518 drivers/gpu/drm/nouveau/dispnv04/dfp.c 	bool was_powersaving = is_powersaving_dpms(nv_encoder->last_dpms);
nv_encoder        520 drivers/gpu/drm/nouveau/dispnv04/dfp.c 	if (nv_encoder->last_dpms == mode)
nv_encoder        522 drivers/gpu/drm/nouveau/dispnv04/dfp.c 	nv_encoder->last_dpms = mode;
nv_encoder        525 drivers/gpu/drm/nouveau/dispnv04/dfp.c 		 mode, nv_encoder->dcb->index);
nv_encoder        530 drivers/gpu/drm/nouveau/dispnv04/dfp.c 	if (nv_encoder->dcb->lvdsconf.use_power_scripts) {
nv_encoder        535 drivers/gpu/drm/nouveau/dispnv04/dfp.c 			   nv04_dfp_get_bound_head(dev, nv_encoder->dcb);
nv_encoder        538 drivers/gpu/drm/nouveau/dispnv04/dfp.c 			call_lvds_script(dev, nv_encoder->dcb, head,
nv_encoder        539 drivers/gpu/drm/nouveau/dispnv04/dfp.c 					 LVDS_PANEL_ON, nv_encoder->mode.clock);
nv_encoder        544 drivers/gpu/drm/nouveau/dispnv04/dfp.c 			call_lvds_script(dev, nv_encoder->dcb, head,
nv_encoder        552 drivers/gpu/drm/nouveau/dispnv04/dfp.c 		nv04_dfp_prepare_sel_clk(dev, nv_encoder, nouveau_crtc(crtc)->index);
nv_encoder        563 drivers/gpu/drm/nouveau/dispnv04/dfp.c 	struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder);
nv_encoder        565 drivers/gpu/drm/nouveau/dispnv04/dfp.c 	if (nv_encoder->last_dpms == mode)
nv_encoder        567 drivers/gpu/drm/nouveau/dispnv04/dfp.c 	nv_encoder->last_dpms = mode;
nv_encoder        570 drivers/gpu/drm/nouveau/dispnv04/dfp.c 		 mode, nv_encoder->dcb->index);
nv_encoder        578 drivers/gpu/drm/nouveau/dispnv04/dfp.c 	struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder);
nv_encoder        582 drivers/gpu/drm/nouveau/dispnv04/dfp.c 		nv_encoder->restore.head =
nv_encoder        583 drivers/gpu/drm/nouveau/dispnv04/dfp.c 			nv04_dfp_get_bound_head(dev, nv_encoder->dcb);
nv_encoder        588 drivers/gpu/drm/nouveau/dispnv04/dfp.c 	struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder);
nv_encoder        590 drivers/gpu/drm/nouveau/dispnv04/dfp.c 	int head = nv_encoder->restore.head;
nv_encoder        592 drivers/gpu/drm/nouveau/dispnv04/dfp.c 	if (nv_encoder->dcb->type == DCB_OUTPUT_LVDS) {
nv_encoder        594 drivers/gpu/drm/nouveau/dispnv04/dfp.c 			nouveau_encoder_connector_get(nv_encoder);
nv_encoder        597 drivers/gpu/drm/nouveau/dispnv04/dfp.c 			call_lvds_script(dev, nv_encoder->dcb, head,
nv_encoder        601 drivers/gpu/drm/nouveau/dispnv04/dfp.c 	} else if (nv_encoder->dcb->type == DCB_OUTPUT_TMDS) {
nv_encoder        605 drivers/gpu/drm/nouveau/dispnv04/dfp.c 		run_tmds_table(dev, nv_encoder->dcb, head, clock);
nv_encoder        608 drivers/gpu/drm/nouveau/dispnv04/dfp.c 	nv_encoder->last_dpms = NV_DPMS_CLEARED;
nv_encoder        613 drivers/gpu/drm/nouveau/dispnv04/dfp.c 	struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder);
nv_encoder        619 drivers/gpu/drm/nouveau/dispnv04/dfp.c 	kfree(nv_encoder);
nv_encoder        680 drivers/gpu/drm/nouveau/dispnv04/dfp.c 	struct nouveau_encoder *nv_encoder = NULL;
nv_encoder        697 drivers/gpu/drm/nouveau/dispnv04/dfp.c 	nv_encoder = kzalloc(sizeof(*nv_encoder), GFP_KERNEL);
nv_encoder        698 drivers/gpu/drm/nouveau/dispnv04/dfp.c 	if (!nv_encoder)
nv_encoder        701 drivers/gpu/drm/nouveau/dispnv04/dfp.c 	nv_encoder->enc_save = nv04_dfp_save;
nv_encoder        702 drivers/gpu/drm/nouveau/dispnv04/dfp.c 	nv_encoder->enc_restore = nv04_dfp_restore;
nv_encoder        704 drivers/gpu/drm/nouveau/dispnv04/dfp.c 	encoder = to_drm_encoder(nv_encoder);
nv_encoder        706 drivers/gpu/drm/nouveau/dispnv04/dfp.c 	nv_encoder->dcb = entry;
nv_encoder        707 drivers/gpu/drm/nouveau/dispnv04/dfp.c 	nv_encoder->or = ffs(entry->or) - 1;
nv_encoder        195 drivers/gpu/drm/nouveau/dispnv04/disp.c 	struct nouveau_encoder *nv_encoder;
nv_encoder        267 drivers/gpu/drm/nouveau/dispnv04/disp.c 		struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder);
nv_encoder        269 drivers/gpu/drm/nouveau/dispnv04/disp.c 			nvkm_i2c_bus_find(i2c, nv_encoder->dcb->i2c_index);
nv_encoder        270 drivers/gpu/drm/nouveau/dispnv04/disp.c 		nv_encoder->i2c = bus ? &bus->i2c : NULL;
nv_encoder        277 drivers/gpu/drm/nouveau/dispnv04/disp.c 	list_for_each_entry(nv_encoder, &dev->mode_config.encoder_list, base.base.head)
nv_encoder        278 drivers/gpu/drm/nouveau/dispnv04/disp.c 		nv_encoder->enc_save(&nv_encoder->base.base);
nv_encoder         78 drivers/gpu/drm/nouveau/dispnv04/tvnv04.c 	struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder);
nv_encoder         83 drivers/gpu/drm/nouveau/dispnv04/tvnv04.c 		 mode, nv_encoder->dcb->index);
nv_encoder        166 drivers/gpu/drm/nouveau/dispnv04/tvnv04.c 	struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder);
nv_encoder        175 drivers/gpu/drm/nouveau/dispnv04/tvnv04.c 		 nouveau_encoder_connector_get(nv_encoder)->base.name,
nv_encoder        176 drivers/gpu/drm/nouveau/dispnv04/tvnv04.c 		 nv_crtc->index, '@' + ffs(nv_encoder->dcb->or));
nv_encoder        204 drivers/gpu/drm/nouveau/dispnv04/tvnv04.c 	struct nouveau_encoder *nv_encoder;
nv_encoder        218 drivers/gpu/drm/nouveau/dispnv04/tvnv04.c 	nv_encoder = kzalloc(sizeof(*nv_encoder), GFP_KERNEL);
nv_encoder        219 drivers/gpu/drm/nouveau/dispnv04/tvnv04.c 	if (!nv_encoder)
nv_encoder        223 drivers/gpu/drm/nouveau/dispnv04/tvnv04.c 	encoder = to_drm_encoder(nv_encoder);
nv_encoder        229 drivers/gpu/drm/nouveau/dispnv04/tvnv04.c 	nv_encoder->enc_save = drm_i2c_encoder_save;
nv_encoder        230 drivers/gpu/drm/nouveau/dispnv04/tvnv04.c 	nv_encoder->enc_restore = drm_i2c_encoder_restore;
nv_encoder        234 drivers/gpu/drm/nouveau/dispnv04/tvnv04.c 	nv_encoder->dcb = entry;
nv_encoder        235 drivers/gpu/drm/nouveau/dispnv04/tvnv04.c 	nv_encoder->or = ffs(entry->or) - 1;
nv_encoder        252 drivers/gpu/drm/nouveau/dispnv04/tvnv04.c 	kfree(nv_encoder);
nv_encoder        577 drivers/gpu/drm/nouveau/dispnv04/tvnv17.c 	struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder);
nv_encoder        602 drivers/gpu/drm/nouveau/dispnv04/tvnv17.c 		nouveau_encoder_connector_get(nv_encoder)->base.name,
nv_encoder        603 drivers/gpu/drm/nouveau/dispnv04/tvnv17.c 		nv_crtc->index, '@' + ffs(nv_encoder->dcb->or));
nv_encoder        260 drivers/gpu/drm/nouveau/dispnv50/disp.c nv50_outp_release(struct nouveau_encoder *nv_encoder)
nv_encoder        262 drivers/gpu/drm/nouveau/dispnv50/disp.c 	struct nv50_disp *disp = nv50_disp(nv_encoder->base.base.dev);
nv_encoder        268 drivers/gpu/drm/nouveau/dispnv50/disp.c 		.base.hasht  = nv_encoder->dcb->hasht,
nv_encoder        269 drivers/gpu/drm/nouveau/dispnv50/disp.c 		.base.hashm  = nv_encoder->dcb->hashm,
nv_encoder        273 drivers/gpu/drm/nouveau/dispnv50/disp.c 	nv_encoder->or = -1;
nv_encoder        274 drivers/gpu/drm/nouveau/dispnv50/disp.c 	nv_encoder->link = 0;
nv_encoder        278 drivers/gpu/drm/nouveau/dispnv50/disp.c nv50_outp_acquire(struct nouveau_encoder *nv_encoder)
nv_encoder        280 drivers/gpu/drm/nouveau/dispnv50/disp.c 	struct nouveau_drm *drm = nouveau_drm(nv_encoder->base.base.dev);
nv_encoder        288 drivers/gpu/drm/nouveau/dispnv50/disp.c 		.base.hasht  = nv_encoder->dcb->hasht,
nv_encoder        289 drivers/gpu/drm/nouveau/dispnv50/disp.c 		.base.hashm  = nv_encoder->dcb->hashm,
nv_encoder        299 drivers/gpu/drm/nouveau/dispnv50/disp.c 	nv_encoder->or = args.info.or;
nv_encoder        300 drivers/gpu/drm/nouveau/dispnv50/disp.c 	nv_encoder->link = args.info.link;
nv_encoder        378 drivers/gpu/drm/nouveau/dispnv50/disp.c 	struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder);
nv_encoder        380 drivers/gpu/drm/nouveau/dispnv50/disp.c 	if (nv_encoder->crtc)
nv_encoder        381 drivers/gpu/drm/nouveau/dispnv50/disp.c 		core->func->dac->ctrl(core, nv_encoder->or, 0x00000000, NULL);
nv_encoder        382 drivers/gpu/drm/nouveau/dispnv50/disp.c 	nv_encoder->crtc = NULL;
nv_encoder        383 drivers/gpu/drm/nouveau/dispnv50/disp.c 	nv50_outp_release(nv_encoder);
nv_encoder        389 drivers/gpu/drm/nouveau/dispnv50/disp.c 	struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder);
nv_encoder        394 drivers/gpu/drm/nouveau/dispnv50/disp.c 	nv50_outp_acquire(nv_encoder);
nv_encoder        396 drivers/gpu/drm/nouveau/dispnv50/disp.c 	core->func->dac->ctrl(core, nv_encoder->or, 1 << nv_crtc->index, asyh);
nv_encoder        399 drivers/gpu/drm/nouveau/dispnv50/disp.c 	nv_encoder->crtc = encoder->crtc;
nv_encoder        405 drivers/gpu/drm/nouveau/dispnv50/disp.c 	struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder);
nv_encoder        413 drivers/gpu/drm/nouveau/dispnv50/disp.c 		.base.hasht  = nv_encoder->dcb->hasht,
nv_encoder        414 drivers/gpu/drm/nouveau/dispnv50/disp.c 		.base.hashm  = nv_encoder->dcb->hashm,
nv_encoder        455 drivers/gpu/drm/nouveau/dispnv50/disp.c 	struct nouveau_encoder *nv_encoder;
nv_encoder        459 drivers/gpu/drm/nouveau/dispnv50/disp.c 	nv_encoder = kzalloc(sizeof(*nv_encoder), GFP_KERNEL);
nv_encoder        460 drivers/gpu/drm/nouveau/dispnv50/disp.c 	if (!nv_encoder)
nv_encoder        462 drivers/gpu/drm/nouveau/dispnv50/disp.c 	nv_encoder->dcb = dcbe;
nv_encoder        466 drivers/gpu/drm/nouveau/dispnv50/disp.c 		nv_encoder->i2c = &bus->i2c;
nv_encoder        468 drivers/gpu/drm/nouveau/dispnv50/disp.c 	encoder = to_drm_encoder(nv_encoder);
nv_encoder        485 drivers/gpu/drm/nouveau/dispnv50/disp.c 	struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder);
nv_encoder        493 drivers/gpu/drm/nouveau/dispnv50/disp.c 		.base.hasht   = nv_encoder->dcb->hasht,
nv_encoder        494 drivers/gpu/drm/nouveau/dispnv50/disp.c 		.base.hashm   = (0xf0ff & nv_encoder->dcb->hashm) |
nv_encoder        504 drivers/gpu/drm/nouveau/dispnv50/disp.c 	struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder);
nv_encoder        517 drivers/gpu/drm/nouveau/dispnv50/disp.c 		.base.mthd.hasht   = nv_encoder->dcb->hasht,
nv_encoder        518 drivers/gpu/drm/nouveau/dispnv50/disp.c 		.base.mthd.hashm   = (0xf0ff & nv_encoder->dcb->hashm) |
nv_encoder        522 drivers/gpu/drm/nouveau/dispnv50/disp.c 	nv_connector = nouveau_encoder_connector_get(nv_encoder);
nv_encoder        538 drivers/gpu/drm/nouveau/dispnv50/disp.c 	struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder);
nv_encoder        546 drivers/gpu/drm/nouveau/dispnv50/disp.c 		.base.hasht  = nv_encoder->dcb->hasht,
nv_encoder        547 drivers/gpu/drm/nouveau/dispnv50/disp.c 		.base.hashm  = (0xf0ff & nv_encoder->dcb->hashm) |
nv_encoder        558 drivers/gpu/drm/nouveau/dispnv50/disp.c 	struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder);
nv_encoder        568 drivers/gpu/drm/nouveau/dispnv50/disp.c 		.base.hasht  = nv_encoder->dcb->hasht,
nv_encoder        569 drivers/gpu/drm/nouveau/dispnv50/disp.c 		.base.hashm  = (0xf0ff & nv_encoder->dcb->hashm) |
nv_encoder        584 drivers/gpu/drm/nouveau/dispnv50/disp.c 	nv_connector = nouveau_encoder_connector_get(nv_encoder);
nv_encoder        638 drivers/gpu/drm/nouveau/dispnv50/disp.c 	ret = drm_scdc_readb(nv_encoder->i2c, SCDC_TMDS_CONFIG, &config);
nv_encoder        646 drivers/gpu/drm/nouveau/dispnv50/disp.c 	ret = drm_scdc_writeb(nv_encoder->i2c, SCDC_TMDS_CONFIG, config);
nv_encoder       1407 drivers/gpu/drm/nouveau/dispnv50/disp.c nv50_sor_update(struct nouveau_encoder *nv_encoder, u8 head,
nv_encoder       1410 drivers/gpu/drm/nouveau/dispnv50/disp.c 	struct nv50_disp *disp = nv50_disp(nv_encoder->base.base.dev);
nv_encoder       1414 drivers/gpu/drm/nouveau/dispnv50/disp.c 		nv_encoder->ctrl &= ~BIT(head);
nv_encoder       1415 drivers/gpu/drm/nouveau/dispnv50/disp.c 		if (!(nv_encoder->ctrl & 0x0000000f))
nv_encoder       1416 drivers/gpu/drm/nouveau/dispnv50/disp.c 			nv_encoder->ctrl = 0;
nv_encoder       1418 drivers/gpu/drm/nouveau/dispnv50/disp.c 		nv_encoder->ctrl |= proto << 8;
nv_encoder       1419 drivers/gpu/drm/nouveau/dispnv50/disp.c 		nv_encoder->ctrl |= BIT(head);
nv_encoder       1423 drivers/gpu/drm/nouveau/dispnv50/disp.c 	core->func->sor->ctrl(core, nv_encoder->or, nv_encoder->ctrl, asyh);
nv_encoder       1429 drivers/gpu/drm/nouveau/dispnv50/disp.c 	struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder);
nv_encoder       1430 drivers/gpu/drm/nouveau/dispnv50/disp.c 	struct nouveau_crtc *nv_crtc = nouveau_crtc(nv_encoder->crtc);
nv_encoder       1432 drivers/gpu/drm/nouveau/dispnv50/disp.c 	nv_encoder->crtc = NULL;
nv_encoder       1435 drivers/gpu/drm/nouveau/dispnv50/disp.c 		struct nvkm_i2c_aux *aux = nv_encoder->aux;
nv_encoder       1447 drivers/gpu/drm/nouveau/dispnv50/disp.c 		nv_encoder->update(nv_encoder, nv_crtc->index, NULL, 0, 0);
nv_encoder       1449 drivers/gpu/drm/nouveau/dispnv50/disp.c 		nv50_hdmi_disable(&nv_encoder->base.base, nv_crtc);
nv_encoder       1450 drivers/gpu/drm/nouveau/dispnv50/disp.c 		nv50_outp_release(nv_encoder);
nv_encoder       1457 drivers/gpu/drm/nouveau/dispnv50/disp.c 	struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder);
nv_encoder       1467 drivers/gpu/drm/nouveau/dispnv50/disp.c 		.base.hasht   = nv_encoder->dcb->hasht,
nv_encoder       1468 drivers/gpu/drm/nouveau/dispnv50/disp.c 		.base.hashm   = nv_encoder->dcb->hashm,
nv_encoder       1478 drivers/gpu/drm/nouveau/dispnv50/disp.c 	nv_connector = nouveau_encoder_connector_get(nv_encoder);
nv_encoder       1479 drivers/gpu/drm/nouveau/dispnv50/disp.c 	nv_encoder->crtc = encoder->crtc;
nv_encoder       1480 drivers/gpu/drm/nouveau/dispnv50/disp.c 	nv50_outp_acquire(nv_encoder);
nv_encoder       1482 drivers/gpu/drm/nouveau/dispnv50/disp.c 	switch (nv_encoder->dcb->type) {
nv_encoder       1484 drivers/gpu/drm/nouveau/dispnv50/disp.c 		if (nv_encoder->link & 1) {
nv_encoder       1493 drivers/gpu/drm/nouveau/dispnv50/disp.c 			    nv_encoder->dcb->duallink_possible &&
nv_encoder       1500 drivers/gpu/drm/nouveau/dispnv50/disp.c 		nv50_hdmi_enable(&nv_encoder->base.base, mode);
nv_encoder       1536 drivers/gpu/drm/nouveau/dispnv50/disp.c 		if (nv_encoder->link & 1)
nv_encoder       1548 drivers/gpu/drm/nouveau/dispnv50/disp.c 	nv_encoder->update(nv_encoder, nv_crtc->index, asyh, proto, depth);
nv_encoder       1561 drivers/gpu/drm/nouveau/dispnv50/disp.c 	struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder);
nv_encoder       1562 drivers/gpu/drm/nouveau/dispnv50/disp.c 	nv50_mstm_del(&nv_encoder->dp.mstm);
nv_encoder       1579 drivers/gpu/drm/nouveau/dispnv50/disp.c 	struct nouveau_encoder *nv_encoder;
nv_encoder       1594 drivers/gpu/drm/nouveau/dispnv50/disp.c 	nv_encoder = kzalloc(sizeof(*nv_encoder), GFP_KERNEL);
nv_encoder       1595 drivers/gpu/drm/nouveau/dispnv50/disp.c 	if (!nv_encoder)
nv_encoder       1597 drivers/gpu/drm/nouveau/dispnv50/disp.c 	nv_encoder->dcb = dcbe;
nv_encoder       1598 drivers/gpu/drm/nouveau/dispnv50/disp.c 	nv_encoder->update = nv50_sor_update;
nv_encoder       1600 drivers/gpu/drm/nouveau/dispnv50/disp.c 	encoder = to_drm_encoder(nv_encoder);
nv_encoder       1619 drivers/gpu/drm/nouveau/dispnv50/disp.c 				nv_encoder->i2c = &aux->i2c;
nv_encoder       1621 drivers/gpu/drm/nouveau/dispnv50/disp.c 				nv_encoder->i2c = &nv_connector->aux.ddc;
nv_encoder       1623 drivers/gpu/drm/nouveau/dispnv50/disp.c 			nv_encoder->aux = aux;
nv_encoder       1629 drivers/gpu/drm/nouveau/dispnv50/disp.c 			ret = nv50_mstm_new(nv_encoder, &nv_connector->aux, 16,
nv_encoder       1631 drivers/gpu/drm/nouveau/dispnv50/disp.c 					    &nv_encoder->dp.mstm);
nv_encoder       1639 drivers/gpu/drm/nouveau/dispnv50/disp.c 			nv_encoder->i2c = &bus->i2c;
nv_encoder       1663 drivers/gpu/drm/nouveau/dispnv50/disp.c 	struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder);
nv_encoder       1665 drivers/gpu/drm/nouveau/dispnv50/disp.c 	if (nv_encoder->crtc)
nv_encoder       1666 drivers/gpu/drm/nouveau/dispnv50/disp.c 		core->func->pior->ctrl(core, nv_encoder->or, 0x00000000, NULL);
nv_encoder       1667 drivers/gpu/drm/nouveau/dispnv50/disp.c 	nv_encoder->crtc = NULL;
nv_encoder       1668 drivers/gpu/drm/nouveau/dispnv50/disp.c 	nv50_outp_release(nv_encoder);
nv_encoder       1674 drivers/gpu/drm/nouveau/dispnv50/disp.c 	struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder);
nv_encoder       1682 drivers/gpu/drm/nouveau/dispnv50/disp.c 	nv50_outp_acquire(nv_encoder);
nv_encoder       1684 drivers/gpu/drm/nouveau/dispnv50/disp.c 	nv_connector = nouveau_encoder_connector_get(nv_encoder);
nv_encoder       1692 drivers/gpu/drm/nouveau/dispnv50/disp.c 	switch (nv_encoder->dcb->type) {
nv_encoder       1702 drivers/gpu/drm/nouveau/dispnv50/disp.c 	core->func->pior->ctrl(core, nv_encoder->or, (proto << 8) | owner, asyh);
nv_encoder       1703 drivers/gpu/drm/nouveau/dispnv50/disp.c 	nv_encoder->crtc = encoder->crtc;
nv_encoder       1733 drivers/gpu/drm/nouveau/dispnv50/disp.c 	struct nouveau_encoder *nv_encoder;
nv_encoder       1752 drivers/gpu/drm/nouveau/dispnv50/disp.c 	nv_encoder = kzalloc(sizeof(*nv_encoder), GFP_KERNEL);
nv_encoder       1753 drivers/gpu/drm/nouveau/dispnv50/disp.c 	if (!nv_encoder)
nv_encoder       1755 drivers/gpu/drm/nouveau/dispnv50/disp.c 	nv_encoder->dcb = dcbe;
nv_encoder       1756 drivers/gpu/drm/nouveau/dispnv50/disp.c 	nv_encoder->i2c = ddc;
nv_encoder       1757 drivers/gpu/drm/nouveau/dispnv50/disp.c 	nv_encoder->aux = aux;
nv_encoder       1759 drivers/gpu/drm/nouveau/dispnv50/disp.c 	encoder = to_drm_encoder(nv_encoder);
nv_encoder       2254 drivers/gpu/drm/nouveau/dispnv50/disp.c 	struct nouveau_encoder *nv_encoder;
nv_encoder       2267 drivers/gpu/drm/nouveau/dispnv50/disp.c 			nv_encoder = nouveau_encoder(encoder);
nv_encoder       2268 drivers/gpu/drm/nouveau/dispnv50/disp.c 			nv50_mstm_fini(nv_encoder->dp.mstm);
nv_encoder       2284 drivers/gpu/drm/nouveau/dispnv50/disp.c 			struct nouveau_encoder *nv_encoder =
nv_encoder       2286 drivers/gpu/drm/nouveau/dispnv50/disp.c 			nv50_mstm_init(nv_encoder->dp.mstm);
nv_encoder         68 drivers/gpu/drm/nouveau/nouveau_backlight.c 	struct nouveau_encoder *nv_encoder = bl_get_data(bd);
nv_encoder         69 drivers/gpu/drm/nouveau/nouveau_backlight.c 	struct nouveau_drm *drm = nouveau_drm(nv_encoder->base.base.dev);
nv_encoder         80 drivers/gpu/drm/nouveau/nouveau_backlight.c 	struct nouveau_encoder *nv_encoder = bl_get_data(bd);
nv_encoder         81 drivers/gpu/drm/nouveau/nouveau_backlight.c 	struct nouveau_drm *drm = nouveau_drm(nv_encoder->base.base.dev);
nv_encoder        118 drivers/gpu/drm/nouveau/nouveau_backlight.c 	struct nouveau_encoder *nv_encoder = bl_get_data(bd);
nv_encoder        119 drivers/gpu/drm/nouveau/nouveau_backlight.c 	struct nouveau_drm *drm = nouveau_drm(nv_encoder->base.base.dev);
nv_encoder        121 drivers/gpu/drm/nouveau/nouveau_backlight.c 	int or = ffs(nv_encoder->dcb->or) - 1;
nv_encoder        133 drivers/gpu/drm/nouveau/nouveau_backlight.c 	struct nouveau_encoder *nv_encoder = bl_get_data(bd);
nv_encoder        134 drivers/gpu/drm/nouveau/nouveau_backlight.c 	struct nouveau_drm *drm = nouveau_drm(nv_encoder->base.base.dev);
nv_encoder        136 drivers/gpu/drm/nouveau/nouveau_backlight.c 	int or = ffs(nv_encoder->dcb->or) - 1;
nv_encoder        154 drivers/gpu/drm/nouveau/nouveau_backlight.c 	struct nouveau_encoder *nv_encoder = bl_get_data(bd);
nv_encoder        155 drivers/gpu/drm/nouveau/nouveau_backlight.c 	struct nouveau_drm *drm = nouveau_drm(nv_encoder->base.base.dev);
nv_encoder        157 drivers/gpu/drm/nouveau/nouveau_backlight.c 	int or = ffs(nv_encoder->dcb->or) - 1;
nv_encoder        172 drivers/gpu/drm/nouveau/nouveau_backlight.c 	struct nouveau_encoder *nv_encoder = bl_get_data(bd);
nv_encoder        173 drivers/gpu/drm/nouveau/nouveau_backlight.c 	struct nouveau_drm *drm = nouveau_drm(nv_encoder->base.base.dev);
nv_encoder        175 drivers/gpu/drm/nouveau/nouveau_backlight.c 	int or = ffs(nv_encoder->dcb->or) - 1;
nv_encoder        198 drivers/gpu/drm/nouveau/nouveau_backlight.c nv50_backlight_init(struct nouveau_encoder *nv_encoder,
nv_encoder        202 drivers/gpu/drm/nouveau/nouveau_backlight.c 	struct nouveau_drm *drm = nouveau_drm(nv_encoder->base.base.dev);
nv_encoder        205 drivers/gpu/drm/nouveau/nouveau_backlight.c 	if (!nvif_rd32(device, NV50_PDISP_SOR_PWM_CTL(ffs(nv_encoder->dcb->or) - 1)))
nv_encoder        226 drivers/gpu/drm/nouveau/nouveau_backlight.c 	struct nouveau_encoder *nv_encoder = NULL;
nv_encoder        239 drivers/gpu/drm/nouveau/nouveau_backlight.c 		nv_encoder = find_encoder(connector, DCB_OUTPUT_LVDS);
nv_encoder        241 drivers/gpu/drm/nouveau/nouveau_backlight.c 		nv_encoder = find_encoder(connector, DCB_OUTPUT_DP);
nv_encoder        245 drivers/gpu/drm/nouveau/nouveau_backlight.c 	if (!nv_encoder)
nv_encoder        250 drivers/gpu/drm/nouveau/nouveau_backlight.c 		ret = nv40_backlight_init(nv_encoder, &props, &ops);
nv_encoder        259 drivers/gpu/drm/nouveau/nouveau_backlight.c 		ret = nv50_backlight_init(nv_encoder, &props, &ops);
nv_encoder        280 drivers/gpu/drm/nouveau/nouveau_backlight.c 					    nv_encoder, ops, &props);
nv_encoder        380 drivers/gpu/drm/nouveau/nouveau_connector.c 	struct nouveau_encoder *nv_encoder;
nv_encoder        385 drivers/gpu/drm/nouveau/nouveau_connector.c 		nv_encoder = nouveau_encoder(enc);
nv_encoder        388 drivers/gpu/drm/nouveau/nouveau_connector.c 		    (nv_encoder->dcb && nv_encoder->dcb->type == type))
nv_encoder        389 drivers/gpu/drm/nouveau/nouveau_connector.c 			return nv_encoder;
nv_encoder        429 drivers/gpu/drm/nouveau/nouveau_connector.c 	struct nouveau_encoder *nv_encoder = NULL, *found = NULL;
nv_encoder        435 drivers/gpu/drm/nouveau/nouveau_connector.c 		nv_encoder = nouveau_encoder(encoder);
nv_encoder        437 drivers/gpu/drm/nouveau/nouveau_connector.c 		switch (nv_encoder->dcb->type) {
nv_encoder        439 drivers/gpu/drm/nouveau/nouveau_connector.c 			ret = nouveau_dp_detect(nv_encoder);
nv_encoder        443 drivers/gpu/drm/nouveau/nouveau_connector.c 				found = nv_encoder;
nv_encoder        451 drivers/gpu/drm/nouveau/nouveau_connector.c 			if (!nv_encoder->i2c)
nv_encoder        456 drivers/gpu/drm/nouveau/nouveau_connector.c 			if (nvkm_probe_i2c(nv_encoder->i2c, 0x50))
nv_encoder        457 drivers/gpu/drm/nouveau/nouveau_connector.c 				found = nv_encoder;
nv_encoder        476 drivers/gpu/drm/nouveau/nouveau_connector.c 	struct nouveau_encoder *nv_encoder;
nv_encoder        480 drivers/gpu/drm/nouveau/nouveau_connector.c 	    !((nv_encoder = find_encoder(connector, DCB_OUTPUT_TMDS)) ||
nv_encoder        481 drivers/gpu/drm/nouveau/nouveau_connector.c 	      (nv_encoder = find_encoder(connector, DCB_OUTPUT_ANALOG))))
nv_encoder        489 drivers/gpu/drm/nouveau/nouveau_connector.c 		if (nv_encoder->dcb->i2c_index == idx && edid) {
nv_encoder        493 drivers/gpu/drm/nouveau/nouveau_connector.c 			return nv_encoder;
nv_encoder        502 drivers/gpu/drm/nouveau/nouveau_connector.c 			      struct nouveau_encoder *nv_encoder)
nv_encoder        508 drivers/gpu/drm/nouveau/nouveau_connector.c 	if (nv_connector->detected_encoder == nv_encoder)
nv_encoder        510 drivers/gpu/drm/nouveau/nouveau_connector.c 	nv_connector->detected_encoder = nv_encoder;
nv_encoder        516 drivers/gpu/drm/nouveau/nouveau_connector.c 	if (nv_encoder->dcb->type == DCB_OUTPUT_LVDS ||
nv_encoder        517 drivers/gpu/drm/nouveau/nouveau_connector.c 	    nv_encoder->dcb->type == DCB_OUTPUT_TMDS) {
nv_encoder        535 drivers/gpu/drm/nouveau/nouveau_connector.c 			nv_encoder->dcb->type == DCB_OUTPUT_TMDS ?
nv_encoder        547 drivers/gpu/drm/nouveau/nouveau_connector.c 	struct nouveau_encoder *nv_encoder = NULL;
nv_encoder        575 drivers/gpu/drm/nouveau/nouveau_connector.c 	nv_encoder = nouveau_connector_ddc_detect(connector);
nv_encoder        576 drivers/gpu/drm/nouveau/nouveau_connector.c 	if (nv_encoder && (i2c = nv_encoder->i2c) != NULL) {
nv_encoder        599 drivers/gpu/drm/nouveau/nouveau_connector.c 		if (nv_encoder->dcb->type == DCB_OUTPUT_TMDS)
nv_encoder        601 drivers/gpu/drm/nouveau/nouveau_connector.c 		if (nv_encoder->dcb->type == DCB_OUTPUT_ANALOG)
nv_encoder        604 drivers/gpu/drm/nouveau/nouveau_connector.c 		if (nv_partner && ((nv_encoder->dcb->type == DCB_OUTPUT_ANALOG &&
nv_encoder        606 drivers/gpu/drm/nouveau/nouveau_connector.c 				   (nv_encoder->dcb->type == DCB_OUTPUT_TMDS &&
nv_encoder        613 drivers/gpu/drm/nouveau/nouveau_connector.c 			nv_encoder = find_encoder(connector, type);
nv_encoder        616 drivers/gpu/drm/nouveau/nouveau_connector.c 		nouveau_connector_set_encoder(connector, nv_encoder);
nv_encoder        622 drivers/gpu/drm/nouveau/nouveau_connector.c 	nv_encoder = nouveau_connector_of_detect(connector);
nv_encoder        623 drivers/gpu/drm/nouveau/nouveau_connector.c 	if (nv_encoder) {
nv_encoder        624 drivers/gpu/drm/nouveau/nouveau_connector.c 		nouveau_connector_set_encoder(connector, nv_encoder);
nv_encoder        630 drivers/gpu/drm/nouveau/nouveau_connector.c 	nv_encoder = find_encoder(connector, DCB_OUTPUT_ANALOG);
nv_encoder        631 drivers/gpu/drm/nouveau/nouveau_connector.c 	if (!nv_encoder && !nouveau_tv_disable)
nv_encoder        632 drivers/gpu/drm/nouveau/nouveau_connector.c 		nv_encoder = find_encoder(connector, DCB_OUTPUT_TV);
nv_encoder        633 drivers/gpu/drm/nouveau/nouveau_connector.c 	if (nv_encoder && force) {
nv_encoder        634 drivers/gpu/drm/nouveau/nouveau_connector.c 		struct drm_encoder *encoder = to_drm_encoder(nv_encoder);
nv_encoder        640 drivers/gpu/drm/nouveau/nouveau_connector.c 			nouveau_connector_set_encoder(connector, nv_encoder);
nv_encoder        661 drivers/gpu/drm/nouveau/nouveau_connector.c 	struct nouveau_encoder *nv_encoder = NULL;
nv_encoder        671 drivers/gpu/drm/nouveau/nouveau_connector.c 	nv_encoder = find_encoder(connector, DCB_OUTPUT_LVDS);
nv_encoder        672 drivers/gpu/drm/nouveau/nouveau_connector.c 	if (!nv_encoder)
nv_encoder        691 drivers/gpu/drm/nouveau/nouveau_connector.c 	if (nv_encoder->dcb->lvdsconf.use_acpi_for_edid) {
nv_encoder        703 drivers/gpu/drm/nouveau/nouveau_connector.c 	    nv_encoder->dcb->lvdsconf.use_straps_for_mode)) {
nv_encoder        731 drivers/gpu/drm/nouveau/nouveau_connector.c 	nouveau_connector_set_encoder(connector, nv_encoder);
nv_encoder        740 drivers/gpu/drm/nouveau/nouveau_connector.c 	struct nouveau_encoder *nv_encoder;
nv_encoder        751 drivers/gpu/drm/nouveau/nouveau_connector.c 	nv_encoder = find_encoder(connector, type);
nv_encoder        752 drivers/gpu/drm/nouveau/nouveau_connector.c 	if (!nv_encoder) {
nv_encoder        759 drivers/gpu/drm/nouveau/nouveau_connector.c 	nouveau_connector_set_encoder(connector, nv_encoder);
nv_encoder        767 drivers/gpu/drm/nouveau/nouveau_connector.c 	struct nouveau_encoder *nv_encoder = nv_connector->detected_encoder;
nv_encoder        769 drivers/gpu/drm/nouveau/nouveau_connector.c 	struct drm_encoder *encoder = to_drm_encoder(nv_encoder);
nv_encoder        776 drivers/gpu/drm/nouveau/nouveau_connector.c 		if (nv_encoder && nv_encoder->dcb->type == DCB_OUTPUT_TV)
nv_encoder        859 drivers/gpu/drm/nouveau/nouveau_connector.c 	struct nouveau_encoder *nv_encoder = nv_connector->detected_encoder;
nv_encoder        875 drivers/gpu/drm/nouveau/nouveau_connector.c 	if (nv_encoder->dcb->type != DCB_OUTPUT_LVDS) {
nv_encoder        925 drivers/gpu/drm/nouveau/nouveau_connector.c 	struct nouveau_encoder *nv_encoder = nv_connector->detected_encoder;
nv_encoder        926 drivers/gpu/drm/nouveau/nouveau_connector.c 	struct drm_encoder *encoder = to_drm_encoder(nv_encoder);
nv_encoder        939 drivers/gpu/drm/nouveau/nouveau_connector.c 	if (nv_encoder->dcb->type == DCB_OUTPUT_LVDS &&
nv_encoder        940 drivers/gpu/drm/nouveau/nouveau_connector.c 	    (nv_encoder->dcb->lvdsconf.use_straps_for_mode ||
nv_encoder        975 drivers/gpu/drm/nouveau/nouveau_connector.c 	if (nv_encoder->dcb->type == DCB_OUTPUT_TV)
nv_encoder        990 drivers/gpu/drm/nouveau/nouveau_connector.c 	struct nouveau_encoder *nv_encoder = nv_connector->detected_encoder;
nv_encoder        995 drivers/gpu/drm/nouveau/nouveau_connector.c 		nouveau_duallink && nv_encoder->dcb->duallink_possible ? 2 : 1;
nv_encoder       1038 drivers/gpu/drm/nouveau/nouveau_connector.c 	struct nouveau_encoder *nv_encoder = nv_connector->detected_encoder;
nv_encoder       1039 drivers/gpu/drm/nouveau/nouveau_connector.c 	struct drm_encoder *encoder = to_drm_encoder(nv_encoder);
nv_encoder       1043 drivers/gpu/drm/nouveau/nouveau_connector.c 	switch (nv_encoder->dcb->type) {
nv_encoder       1057 drivers/gpu/drm/nouveau/nouveau_connector.c 		max_clock = nv_encoder->dcb->crtconf.maxfreq;
nv_encoder       1064 drivers/gpu/drm/nouveau/nouveau_connector.c 		max_clock  = nv_encoder->dp.link_nr;
nv_encoder       1065 drivers/gpu/drm/nouveau/nouveau_connector.c 		max_clock *= nv_encoder->dp.link_bw;
nv_encoder       1146 drivers/gpu/drm/nouveau/nouveau_connector.c 	struct nouveau_encoder *nv_encoder;
nv_encoder       1153 drivers/gpu/drm/nouveau/nouveau_connector.c 		if ((nv_encoder = find_encoder(connector, DCB_OUTPUT_DP)))
nv_encoder       1154 drivers/gpu/drm/nouveau/nouveau_connector.c 			nv50_mstm_service(nv_encoder->dp.mstm);
nv_encoder       1181 drivers/gpu/drm/nouveau/nouveau_connector.c 	if ((nv_encoder = find_encoder(connector, DCB_OUTPUT_DP))) {
nv_encoder       1183 drivers/gpu/drm/nouveau/nouveau_connector.c 			nv50_mstm_remove(nv_encoder->dp.mstm);
nv_encoder       1198 drivers/gpu/drm/nouveau/nouveau_connector.c 	struct nouveau_encoder *nv_encoder;
nv_encoder       1203 drivers/gpu/drm/nouveau/nouveau_connector.c 	nv_encoder = find_encoder(&nv_connector->base, DCB_OUTPUT_DP);
nv_encoder       1204 drivers/gpu/drm/nouveau/nouveau_connector.c 	if (!nv_encoder || !(aux = nv_encoder->aux))
nv_encoder        138 drivers/gpu/drm/nouveau/nouveau_connector.h 	const struct nouveau_encoder *nv_encoder;
nv_encoder        144 drivers/gpu/drm/nouveau/nouveau_connector.h 	nv_encoder = find_encoder(connector, DCB_OUTPUT_ANY);
nv_encoder        145 drivers/gpu/drm/nouveau/nouveau_connector.h 	if (!nv_encoder)
nv_encoder        148 drivers/gpu/drm/nouveau/nouveau_connector.h 	encoder = &nv_encoder->base.base;
nv_encoder         59 drivers/gpu/drm/nouveau/nouveau_dp.c nouveau_dp_detect(struct nouveau_encoder *nv_encoder)
nv_encoder         61 drivers/gpu/drm/nouveau/nouveau_dp.c 	struct drm_device *dev = nv_encoder->base.base.dev;
nv_encoder         67 drivers/gpu/drm/nouveau/nouveau_dp.c 	aux = nv_encoder->aux;
nv_encoder         75 drivers/gpu/drm/nouveau/nouveau_dp.c 	nv_encoder->dp.link_bw = 27000 * dpcd[1];
nv_encoder         76 drivers/gpu/drm/nouveau/nouveau_dp.c 	nv_encoder->dp.link_nr = dpcd[2] & DP_MAX_LANE_COUNT_MASK;
nv_encoder         79 drivers/gpu/drm/nouveau/nouveau_dp.c 		     nv_encoder->dp.link_nr, nv_encoder->dp.link_bw, dpcd[0]);
nv_encoder         81 drivers/gpu/drm/nouveau/nouveau_dp.c 		     nv_encoder->dcb->dpconf.link_nr,
nv_encoder         82 drivers/gpu/drm/nouveau/nouveau_dp.c 		     nv_encoder->dcb->dpconf.link_bw);
nv_encoder         84 drivers/gpu/drm/nouveau/nouveau_dp.c 	if (nv_encoder->dcb->dpconf.link_nr < nv_encoder->dp.link_nr)
nv_encoder         85 drivers/gpu/drm/nouveau/nouveau_dp.c 		nv_encoder->dp.link_nr = nv_encoder->dcb->dpconf.link_nr;
nv_encoder         86 drivers/gpu/drm/nouveau/nouveau_dp.c 	if (nv_encoder->dcb->dpconf.link_bw < nv_encoder->dp.link_bw)
nv_encoder         87 drivers/gpu/drm/nouveau/nouveau_dp.c 		nv_encoder->dp.link_bw = nv_encoder->dcb->dpconf.link_bw;
nv_encoder         90 drivers/gpu/drm/nouveau/nouveau_dp.c 		     nv_encoder->dp.link_nr, nv_encoder->dp.link_bw);
nv_encoder         94 drivers/gpu/drm/nouveau/nouveau_dp.c 	ret = nv50_mstm_detect(nv_encoder->dp.mstm, dpcd, nouveau_mst);