nv17              404 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv10.c 	int nv17[ARRAY_SIZE(nv17_gr_ctx_regs)];
nv17              895 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv10.c 			nvkm_wr32(device, nv17_gr_ctx_regs[i], chan->nv17[i]);
nv17              921 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv10.c 			chan->nv17[i] = nvkm_rd32(device, nv17_gr_ctx_regs[i]);
nv17              998 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv10.c 		chan->nv17[offset] = val; \