number_of_request_slots_gmc_reserves_for_dmif_per_channel 175 drivers/gpu/drm/amd/display/dc/calcs/calcs_logger.h vbios->number_of_request_slots_gmc_reserves_for_dmif_per_channel); number_of_request_slots_gmc_reserves_for_dmif_per_channel 1130 drivers/gpu/drm/amd/display/dc/calcs/dce_calcs.c data->total_dmifmc_urgent_trips = bw_ceil2(bw_div(data->total_requests_for_adjusted_dmif_size, (bw_add(dceip->dmif_request_buffer_size, bw_int_to_fixed(vbios->number_of_request_slots_gmc_reserves_for_dmif_per_channel * data->number_of_dram_channels)))), bw_int_to_fixed(1)); number_of_request_slots_gmc_reserves_for_dmif_per_channel 2074 drivers/gpu/drm/amd/display/dc/calcs/dce_calcs.c vbios.number_of_request_slots_gmc_reserves_for_dmif_per_channel = 256; number_of_request_slots_gmc_reserves_for_dmif_per_channel 2190 drivers/gpu/drm/amd/display/dc/calcs/dce_calcs.c vbios.number_of_request_slots_gmc_reserves_for_dmif_per_channel = 256; number_of_request_slots_gmc_reserves_for_dmif_per_channel 2306 drivers/gpu/drm/amd/display/dc/calcs/dce_calcs.c vbios.number_of_request_slots_gmc_reserves_for_dmif_per_channel = 256; number_of_request_slots_gmc_reserves_for_dmif_per_channel 2422 drivers/gpu/drm/amd/display/dc/calcs/dce_calcs.c vbios.number_of_request_slots_gmc_reserves_for_dmif_per_channel = 256; number_of_request_slots_gmc_reserves_for_dmif_per_channel 2535 drivers/gpu/drm/amd/display/dc/calcs/dce_calcs.c vbios.number_of_request_slots_gmc_reserves_for_dmif_per_channel = 256; number_of_request_slots_gmc_reserves_for_dmif_per_channel 2648 drivers/gpu/drm/amd/display/dc/calcs/dce_calcs.c vbios.number_of_request_slots_gmc_reserves_for_dmif_per_channel = 8; number_of_request_slots_gmc_reserves_for_dmif_per_channel 225 drivers/gpu/drm/amd/display/dc/inc/dce_calcs.h uint32_t number_of_request_slots_gmc_reserves_for_dmif_per_channel;