number_of_aligned_displays_with_no_margin  124 drivers/gpu/drm/amd/display/dc/calcs/dce_calcs.c 	int32_t number_of_aligned_displays_with_no_margin = 0;
number_of_aligned_displays_with_no_margin 1450 drivers/gpu/drm/amd/display/dc/calcs/dce_calcs.c 	number_of_aligned_displays_with_no_margin = 0;
number_of_aligned_displays_with_no_margin 1452 drivers/gpu/drm/amd/display/dc/calcs/dce_calcs.c 		number_of_aligned_displays_with_no_margin = bw_fixed_to_int(bw_max2(bw_int_to_fixed(number_of_aligned_displays_with_no_margin), data->displays_with_same_mode[i]));
number_of_aligned_displays_with_no_margin 1458 drivers/gpu/drm/amd/display/dc/calcs/dce_calcs.c 	if (number_of_displays_enabled_with_margin > 0 && (number_of_displays_enabled_with_margin + number_of_aligned_displays_with_no_margin) == number_of_displays_enabled && bw_mtn(data->min_dram_speed_change_margin[high][s_high], bw_int_to_fixed(0)) && bw_ltn(data->min_dram_speed_change_margin[high][s_high], bw_int_to_fixed(9999)) && bw_ltn(data->dispclk_required_for_dram_speed_change[high][s_high], vbios->high_voltage_max_dispclk)) {
number_of_aligned_displays_with_no_margin 1465 drivers/gpu/drm/amd/display/dc/calcs/dce_calcs.c 	if (number_of_aligned_displays_with_no_margin == number_of_displays_enabled) {