num_wm_dmif_sets  555 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c 	wm_with_clock_ranges.num_wm_dmif_sets = ranges->num_reader_wm_sets;
num_wm_dmif_sets  558 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c 	for (i = 0; i < wm_with_clock_ranges.num_wm_dmif_sets; i++) {
num_wm_dmif_sets  677 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c 	wm_with_clock_ranges.num_wm_dmif_sets = ranges->num_reader_wm_sets;
num_wm_dmif_sets  680 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c 	for (i = 0; i < wm_with_clock_ranges.num_wm_dmif_sets; i++) {
num_wm_dmif_sets  174 drivers/gpu/drm/amd/display/dc/dm_services_types.h 	uint32_t num_wm_dmif_sets;
num_wm_dmif_sets  713 drivers/gpu/drm/amd/powerplay/hwmgr/smu_helper.c 	if (wm_with_clock_ranges->num_wm_dmif_sets > 4 || wm_with_clock_ranges->num_wm_mcif_sets > 4)
num_wm_dmif_sets  716 drivers/gpu/drm/amd/powerplay/hwmgr/smu_helper.c 	for (i = 0; i < wm_with_clock_ranges->num_wm_dmif_sets; i++) {
num_wm_dmif_sets 1303 drivers/gpu/drm/amd/powerplay/navi10_ppt.c 	if (clock_ranges->num_wm_dmif_sets > 4 ||
num_wm_dmif_sets 1307 drivers/gpu/drm/amd/powerplay/navi10_ppt.c 	for (i = 0; i < clock_ranges->num_wm_dmif_sets; i++) {
num_wm_dmif_sets 3071 drivers/gpu/drm/amd/powerplay/vega20_ppt.c 	if (clock_ranges->num_wm_dmif_sets > 4 ||
num_wm_dmif_sets 3075 drivers/gpu/drm/amd/powerplay/vega20_ppt.c 	for (i = 0; i < clock_ranges->num_wm_dmif_sets; i++) {