num_tile_mode_states  399 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c 	const u32 num_tile_mode_states = ARRAY_SIZE(adev->gfx.config.tile_mode_array);
num_tile_mode_states  640 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c 		for (reg_offset = 0; reg_offset < num_tile_mode_states; reg_offset++)
num_tile_mode_states  846 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c 		for (reg_offset = 0; reg_offset < num_tile_mode_states; reg_offset++)
num_tile_mode_states 1070 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c 		for (reg_offset = 0; reg_offset < num_tile_mode_states; reg_offset++)
num_tile_mode_states 1294 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c 		for (reg_offset = 0; reg_offset < num_tile_mode_states; reg_offset++)
num_tile_mode_states 1025 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c 	const u32 num_tile_mode_states =
num_tile_mode_states 1048 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c 	for (reg_offset = 0; reg_offset < num_tile_mode_states; reg_offset++)
num_tile_mode_states 1215 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c 		for (reg_offset = 0; reg_offset < num_tile_mode_states; reg_offset++)
num_tile_mode_states 1398 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c 		for (reg_offset = 0; reg_offset < num_tile_mode_states; reg_offset++)
num_tile_mode_states 1568 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c 		for (reg_offset = 0; reg_offset < num_tile_mode_states; reg_offset++)
num_tile_mode_states 2128 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c 	const u32 num_tile_mode_states = ARRAY_SIZE(adev->gfx.config.tile_mode_array);
num_tile_mode_states 2135 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c 	for (reg_offset = 0; reg_offset < num_tile_mode_states; reg_offset++)
num_tile_mode_states 2303 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c 		for (reg_offset = 0; reg_offset < num_tile_mode_states; reg_offset++)
num_tile_mode_states 2495 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c 		for (reg_offset = 0; reg_offset < num_tile_mode_states; reg_offset++)
num_tile_mode_states 2684 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c 		for (reg_offset = 0; reg_offset < num_tile_mode_states; reg_offset++)
num_tile_mode_states 2887 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c 		for (reg_offset = 0; reg_offset < num_tile_mode_states; reg_offset++)
num_tile_mode_states 3089 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c 		for (reg_offset = 0; reg_offset < num_tile_mode_states; reg_offset++)
num_tile_mode_states 3258 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c 		for (reg_offset = 0; reg_offset < num_tile_mode_states; reg_offset++)
num_tile_mode_states 3435 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c 		for (reg_offset = 0; reg_offset < num_tile_mode_states; reg_offset++)
num_tile_mode_states 2337 drivers/gpu/drm/radeon/cik.c 	const u32 num_tile_mode_states =
num_tile_mode_states 2363 drivers/gpu/drm/radeon/cik.c 	for (reg_offset = 0; reg_offset < num_tile_mode_states; reg_offset++)
num_tile_mode_states 2506 drivers/gpu/drm/radeon/cik.c 		for (reg_offset = 0; reg_offset < num_tile_mode_states; reg_offset++)
num_tile_mode_states 2649 drivers/gpu/drm/radeon/cik.c 		for (reg_offset = 0; reg_offset < num_tile_mode_states; reg_offset++)
num_tile_mode_states 2874 drivers/gpu/drm/radeon/cik.c 		for (reg_offset = 0; reg_offset < num_tile_mode_states; reg_offset++)
num_tile_mode_states 3017 drivers/gpu/drm/radeon/cik.c 		for (reg_offset = 0; reg_offset < num_tile_mode_states; reg_offset++)
num_tile_mode_states 2496 drivers/gpu/drm/radeon/si.c 	const u32 num_tile_mode_states =
num_tile_mode_states 2513 drivers/gpu/drm/radeon/si.c 	for (reg_offset = 0; reg_offset < num_tile_mode_states; reg_offset++)
num_tile_mode_states 2727 drivers/gpu/drm/radeon/si.c 		for (reg_offset = 0; reg_offset < num_tile_mode_states; reg_offset++)
num_tile_mode_states 2942 drivers/gpu/drm/radeon/si.c 		for (reg_offset = 0; reg_offset < num_tile_mode_states; reg_offset++)