num_of_levels     359 drivers/gpu/drm/amd/powerplay/arcturus_ppt.c 	uint32_t i, num_of_levels = 0, clk;
num_of_levels     369 drivers/gpu/drm/amd/powerplay/arcturus_ppt.c 	smu_read_smc_arg(smu, &num_of_levels);
num_of_levels     370 drivers/gpu/drm/amd/powerplay/arcturus_ppt.c 	if (!num_of_levels) {
num_of_levels     375 drivers/gpu/drm/amd/powerplay/arcturus_ppt.c 	single_dpm_table->count = num_of_levels;
num_of_levels     376 drivers/gpu/drm/amd/powerplay/arcturus_ppt.c 	for (i = 0; i < num_of_levels; i++) {
num_of_levels     480 drivers/gpu/drm/amd/powerplay/hwmgr/vega12_hwmgr.c 		PPCLK_e clk_id, uint32_t *num_of_levels)
num_of_levels     491 drivers/gpu/drm/amd/powerplay/hwmgr/vega12_hwmgr.c 	*num_of_levels = smum_get_argument(hwmgr);
num_of_levels     492 drivers/gpu/drm/amd/powerplay/hwmgr/vega12_hwmgr.c 	PP_ASSERT_WITH_CODE(*num_of_levels > 0,
num_of_levels     522 drivers/gpu/drm/amd/powerplay/hwmgr/vega12_hwmgr.c 	uint32_t i, num_of_levels, clk;
num_of_levels     524 drivers/gpu/drm/amd/powerplay/hwmgr/vega12_hwmgr.c 	ret = vega12_get_number_of_dpm_level(hwmgr, clk_id, &num_of_levels);
num_of_levels     529 drivers/gpu/drm/amd/powerplay/hwmgr/vega12_hwmgr.c 	dpm_table->count = num_of_levels;
num_of_levels     531 drivers/gpu/drm/amd/powerplay/hwmgr/vega12_hwmgr.c 	for (i = 0; i < num_of_levels; i++) {
num_of_levels     520 drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.c 		PPCLK_e clk_id, uint32_t *num_of_levels)
num_of_levels     531 drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.c 	*num_of_levels = smum_get_argument(hwmgr);
num_of_levels     532 drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.c 	PP_ASSERT_WITH_CODE(*num_of_levels > 0,
num_of_levels     563 drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.c 	uint32_t i, num_of_levels, clk;
num_of_levels     565 drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.c 	ret = vega20_get_number_of_dpm_level(hwmgr, clk_id, &num_of_levels);
num_of_levels     570 drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.c 	dpm_table->count = num_of_levels;
num_of_levels     572 drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.c 	for (i = 0; i < num_of_levels; i++) {
num_of_levels     666 drivers/gpu/drm/amd/powerplay/vega20_ppt.c 	uint32_t i, num_of_levels = 0, clk;
num_of_levels     676 drivers/gpu/drm/amd/powerplay/vega20_ppt.c 	smu_read_smc_arg(smu, &num_of_levels);
num_of_levels     677 drivers/gpu/drm/amd/powerplay/vega20_ppt.c 	if (!num_of_levels) {
num_of_levels     682 drivers/gpu/drm/amd/powerplay/vega20_ppt.c 	single_dpm_table->count = num_of_levels;
num_of_levels     684 drivers/gpu/drm/amd/powerplay/vega20_ppt.c 	for (i = 0; i < num_of_levels; i++) {