num_lm 538 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c topology.num_lm = (mode->vdisplay > MAX_VDISPLAY_SPLIT) ? 2 : 1; num_lm 959 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c int num_lm = 0, num_ctl = 0; num_lm 1024 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c num_lm++; num_lm 1029 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c for (i = 0; i < num_lm; i++) { num_lm 1036 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c cstate->num_mixers = num_lm; num_lm 371 drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c if (!reqs->topology.num_lm) { num_lm 372 drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c DPU_ERROR("invalid number of lm: %d\n", reqs->topology.num_lm); num_lm 378 drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c while (lm_count != reqs->topology.num_lm && num_lm 396 drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c while (lm_count != reqs->topology.num_lm && num_lm 411 drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c if (lm_count != reqs->topology.num_lm) { num_lm 574 drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c reqs->topology.num_lm, reqs->topology.num_enc, num_lm 105 drivers/gpu/drm/msm/msm_drv.h u32 num_lm;