num_levels         76 arch/arm64/kernel/cacheinfo.c 	this_cpu_ci->num_levels = level;
num_levels         88 arch/arm64/kernel/cacheinfo.c 	for (idx = 0, level = 1; level <= this_cpu_ci->num_levels &&
num_levels         48 arch/mips/kernel/cacheinfo.c 	this_cpu_ci->num_levels = levels;
num_levels         32 arch/nds32/kernel/cacheinfo.c 	this_cpu_ci->num_levels = 1;
num_levels         43 arch/nds32/kernel/cacheinfo.c 	for (idx = 0, level = 1; level <= this_cpu_ci->num_levels &&
num_levels         55 arch/riscv/kernel/cacheinfo.c 	this_cpu_ci->num_levels = levels;
num_levels        147 arch/s390/kernel/cache.c 	this_cpu_ci->num_levels = level;
num_levels        163 arch/s390/kernel/cache.c 	for (idx = 0, level = 0; level < this_cpu_ci->num_levels &&
num_levels        996 arch/x86/kernel/cpu/cacheinfo.c 	this_cpu_ci->num_levels = 3;
num_levels       1790 drivers/gpu/drm/amd/amdgpu/kv_dpm.c 			if (table->entries[i].clk <= new_ps->levels[new_ps->num_levels - 1].sclk)
num_levels       1797 drivers/gpu/drm/amd/amdgpu/kv_dpm.c 			    (table->entries[pi->lowest_valid].clk - new_ps->levels[new_ps->num_levels - 1].sclk))
num_levels       1816 drivers/gpu/drm/amd/amdgpu/kv_dpm.c 			    new_ps->levels[new_ps->num_levels - 1].sclk)
num_levels       1825 drivers/gpu/drm/amd/amdgpu/kv_dpm.c 			     new_ps->levels[new_ps->num_levels -1].sclk))
num_levels       2254 drivers/gpu/drm/amd/amdgpu/kv_dpm.c 	for (i = 0; i < ps->num_levels; i++) {
num_levels       2260 drivers/gpu/drm/amd/amdgpu/kv_dpm.c 		for (i = 0; i < ps->num_levels; i++) {
num_levels       2272 drivers/gpu/drm/amd/amdgpu/kv_dpm.c 		for (i = 0; i < ps->num_levels; i++) {
num_levels       2283 drivers/gpu/drm/amd/amdgpu/kv_dpm.c 		for (i = 0; i < ps->num_levels; i++) {
num_levels       2648 drivers/gpu/drm/amd/amdgpu/kv_dpm.c 	ps->num_levels = 1;
num_levels       2693 drivers/gpu/drm/amd/amdgpu/kv_dpm.c 	ps->num_levels = index + 1;
num_levels       2902 drivers/gpu/drm/amd/amdgpu/kv_dpm.c 	for (i = 0; i < ps->num_levels; i++) {
num_levels       2937 drivers/gpu/drm/amd/amdgpu/kv_dpm.c 		return requested_state->levels[requested_state->num_levels - 1].sclk;
num_levels       3260 drivers/gpu/drm/amd/amdgpu/kv_dpm.c 	if (kv_cps->num_levels != kv_rps->num_levels) {
num_levels       3265 drivers/gpu/drm/amd/amdgpu/kv_dpm.c 	for (i = 0; i < kv_cps->num_levels; i++) {
num_levels        109 drivers/gpu/drm/amd/amdgpu/kv_dpm.h 	u32 num_levels;
num_levels       4359 drivers/gpu/drm/amd/amdgpu/si_dpm.c 	u32 data, num_bits, num_levels;
num_levels       4371 drivers/gpu/drm/amd/amdgpu/si_dpm.c 	num_levels = (1 << num_bits);
num_levels       4373 drivers/gpu/drm/amd/amdgpu/si_dpm.c 	if (table->count != num_levels)
num_levels       4376 drivers/gpu/drm/amd/amdgpu/si_dpm.c 	if (limits->count != (num_levels - 1))
num_levels        131 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c 		clks->num_levels = 6;
num_levels        136 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c 		clks->num_levels = 6;
num_levels        141 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c 		clks->num_levels = 2;
num_levels        146 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c 		clks->num_levels = 0;
num_levels        263 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c 		dc_clks->num_levels = DM_PP_MAX_CLOCK_LEVELS;
num_levels        265 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c 		dc_clks->num_levels = pp_clks->count;
num_levels        270 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c 	for (i = 0; i < dc_clks->num_levels; i++) {
num_levels        283 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c 	if (pp_clks->num_levels > DM_PP_MAX_CLOCK_LEVELS) {
num_levels        286 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c 				pp_clks->num_levels,
num_levels        289 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c 		clk_level_info->num_levels = DM_PP_MAX_CLOCK_LEVELS;
num_levels        291 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c 		clk_level_info->num_levels = pp_clks->num_levels;
num_levels        296 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c 	for (i = 0; i < clk_level_info->num_levels; i++) {
num_levels        310 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c 	if (pp_clks->num_levels > DM_PP_MAX_CLOCK_LEVELS) {
num_levels        313 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c 				pp_clks->num_levels,
num_levels        316 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c 		clk_level_info->num_levels = DM_PP_MAX_CLOCK_LEVELS;
num_levels        318 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c 		clk_level_info->num_levels = pp_clks->num_levels;
num_levels        323 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c 	for (i = 0; i < clk_level_info->num_levels; i++) {
num_levels        392 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c 		for (i = 0; i < dc_clks->num_levels; i++) {
num_levels        398 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c 						dc_clks->num_levels, i);
num_levels        399 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c 				dc_clks->num_levels = i > 0 ? i : 1;
num_levels        404 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c 		for (i = 0; i < dc_clks->num_levels; i++) {
num_levels        407 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c 						dc_clks->num_levels, i);
num_levels        408 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c 				dc_clks->num_levels = i > 0 ? i : 1;
num_levels       1425 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c 	if (clks->num_levels == 0)
num_levels       1428 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c 	for (i = 0; i < clks->num_levels; i++)
num_levels       1453 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c 		ASSERT(fclks.num_levels);
num_levels       1456 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c 		vmid0p72_idx = fclks.num_levels -
num_levels       1457 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c 			(fclks.num_levels > 2 ? 3 : (fclks.num_levels > 1 ? 2 : 1));
num_levels       1458 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c 		vnom0p8_idx = fclks.num_levels - (fclks.num_levels > 1 ? 2 : 1);
num_levels       1459 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c 		vmax0p9_idx = fclks.num_levels - 1;
num_levels       1488 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c 	if (res && dcfclks.num_levels >= 3) {
num_levels       1490 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c 		dc->dcn_soc->dcfclkv_mid0p72 = dcfclks.data[dcfclks.num_levels - 3].clocks_in_khz / 1000.0;
num_levels       1491 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c 		dc->dcn_soc->dcfclkv_nom0p8 = dcfclks.data[dcfclks.num_levels - 2].clocks_in_khz / 1000.0;
num_levels       1492 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c 		dc->dcn_soc->dcfclkv_max0p9 = dcfclks.data[dcfclks.num_levels - 1].clocks_in_khz / 1000.0;
num_levels         76 drivers/gpu/drm/amd/display/dc/clk_mgr/dce110/dce110_clk_mgr.c 	if (dc->sclk_lvls.num_levels == 0)
num_levels         79 drivers/gpu/drm/amd/display/dc/clk_mgr/dce110/dce110_clk_mgr.c 	for (i = 0; i < dc->sclk_lvls.num_levels; i++) {
num_levels         89 drivers/gpu/drm/amd/display/dc/clk_mgr/dce110/dce110_clk_mgr.c 	return dc->sclk_lvls.clocks_in_khz[dc->sclk_lvls.num_levels - 1];
num_levels        578 drivers/gpu/drm/amd/display/dc/dce/dce_clk_mgr.c 	if (dc->sclk_lvls.num_levels == 0)
num_levels        581 drivers/gpu/drm/amd/display/dc/dce/dce_clk_mgr.c 	for (i = 0; i < dc->sclk_lvls.num_levels; i++) {
num_levels        591 drivers/gpu/drm/amd/display/dc/dce/dce_clk_mgr.c 	return dc->sclk_lvls.clocks_in_khz[dc->sclk_lvls.num_levels - 1];
num_levels       1216 drivers/gpu/drm/amd/display/dc/dce110/dce110_resource.c 			clks.clocks_in_khz[clks.num_levels-1], 1000);
num_levels       1218 drivers/gpu/drm/amd/display/dc/dce110/dce110_resource.c 			clks.clocks_in_khz[clks.num_levels/8], 1000);
num_levels       1220 drivers/gpu/drm/amd/display/dc/dce110/dce110_resource.c 			clks.clocks_in_khz[clks.num_levels*2/8], 1000);
num_levels       1222 drivers/gpu/drm/amd/display/dc/dce110/dce110_resource.c 			clks.clocks_in_khz[clks.num_levels*3/8], 1000);
num_levels       1224 drivers/gpu/drm/amd/display/dc/dce110/dce110_resource.c 			clks.clocks_in_khz[clks.num_levels*4/8], 1000);
num_levels       1226 drivers/gpu/drm/amd/display/dc/dce110/dce110_resource.c 			clks.clocks_in_khz[clks.num_levels*5/8], 1000);
num_levels       1228 drivers/gpu/drm/amd/display/dc/dce110/dce110_resource.c 			clks.clocks_in_khz[clks.num_levels*6/8], 1000);
num_levels       1239 drivers/gpu/drm/amd/display/dc/dce110/dce110_resource.c 			clks.clocks_in_khz[clks.num_levels-1], 1000);
num_levels       1241 drivers/gpu/drm/amd/display/dc/dce110/dce110_resource.c 			clks.clocks_in_khz[clks.num_levels>>1], 1000);
num_levels       1254 drivers/gpu/drm/amd/display/dc/dce110/dce110_resource.c 		clks.clocks_in_khz[clks.num_levels>>1] * MEMORY_TYPE_MULTIPLIER_CZ,
num_levels       1257 drivers/gpu/drm/amd/display/dc/dce110/dce110_resource.c 		clks.clocks_in_khz[clks.num_levels-1] * MEMORY_TYPE_MULTIPLIER_CZ,
num_levels       1011 drivers/gpu/drm/amd/display/dc/dce112/dce112_resource.c 				clks.clocks_in_khz[clks.num_levels-1], 1000);
num_levels       1013 drivers/gpu/drm/amd/display/dc/dce112/dce112_resource.c 				clks.clocks_in_khz[clks.num_levels/8], 1000);
num_levels       1015 drivers/gpu/drm/amd/display/dc/dce112/dce112_resource.c 				clks.clocks_in_khz[clks.num_levels*2/8], 1000);
num_levels       1017 drivers/gpu/drm/amd/display/dc/dce112/dce112_resource.c 				clks.clocks_in_khz[clks.num_levels*3/8], 1000);
num_levels       1019 drivers/gpu/drm/amd/display/dc/dce112/dce112_resource.c 				clks.clocks_in_khz[clks.num_levels*4/8], 1000);
num_levels       1021 drivers/gpu/drm/amd/display/dc/dce112/dce112_resource.c 				clks.clocks_in_khz[clks.num_levels*5/8], 1000);
num_levels       1023 drivers/gpu/drm/amd/display/dc/dce112/dce112_resource.c 				clks.clocks_in_khz[clks.num_levels*6/8], 1000);
num_levels       1036 drivers/gpu/drm/amd/display/dc/dce112/dce112_resource.c 			clks.clocks_in_khz[clks.num_levels>>1] * memory_type_multiplier,
num_levels       1039 drivers/gpu/drm/amd/display/dc/dce112/dce112_resource.c 			clks.clocks_in_khz[clks.num_levels-1] * memory_type_multiplier,
num_levels       1047 drivers/gpu/drm/amd/display/dc/dce112/dce112_resource.c 		eng_clks.data[eng_clks.num_levels-1].clocks_in_khz, 1000);
num_levels       1049 drivers/gpu/drm/amd/display/dc/dce112/dce112_resource.c 		eng_clks.data[eng_clks.num_levels/8].clocks_in_khz, 1000);
num_levels       1051 drivers/gpu/drm/amd/display/dc/dce112/dce112_resource.c 		eng_clks.data[eng_clks.num_levels*2/8].clocks_in_khz, 1000);
num_levels       1053 drivers/gpu/drm/amd/display/dc/dce112/dce112_resource.c 		eng_clks.data[eng_clks.num_levels*3/8].clocks_in_khz, 1000);
num_levels       1055 drivers/gpu/drm/amd/display/dc/dce112/dce112_resource.c 		eng_clks.data[eng_clks.num_levels*4/8].clocks_in_khz, 1000);
num_levels       1057 drivers/gpu/drm/amd/display/dc/dce112/dce112_resource.c 		eng_clks.data[eng_clks.num_levels*5/8].clocks_in_khz, 1000);
num_levels       1059 drivers/gpu/drm/amd/display/dc/dce112/dce112_resource.c 		eng_clks.data[eng_clks.num_levels*6/8].clocks_in_khz, 1000);
num_levels       1077 drivers/gpu/drm/amd/display/dc/dce112/dce112_resource.c 		mem_clks.data[mem_clks.num_levels>>1].clocks_in_khz * memory_type_multiplier,
num_levels       1080 drivers/gpu/drm/amd/display/dc/dce112/dce112_resource.c 		mem_clks.data[mem_clks.num_levels-1].clocks_in_khz * memory_type_multiplier,
num_levels       1093 drivers/gpu/drm/amd/display/dc/dce112/dce112_resource.c 			eng_clks.data[eng_clks.num_levels*3/8].clocks_in_khz - 1;
num_levels       1097 drivers/gpu/drm/amd/display/dc/dce112/dce112_resource.c 			mem_clks.data[mem_clks.num_levels>>1].clocks_in_khz - 1;
num_levels       1101 drivers/gpu/drm/amd/display/dc/dce112/dce112_resource.c 			eng_clks.data[eng_clks.num_levels*3/8].clocks_in_khz;
num_levels       1107 drivers/gpu/drm/amd/display/dc/dce112/dce112_resource.c 			mem_clks.data[mem_clks.num_levels>>1].clocks_in_khz - 1;
num_levels       1113 drivers/gpu/drm/amd/display/dc/dce112/dce112_resource.c 			eng_clks.data[eng_clks.num_levels*3/8].clocks_in_khz - 1;
num_levels       1115 drivers/gpu/drm/amd/display/dc/dce112/dce112_resource.c 			mem_clks.data[mem_clks.num_levels>>1].clocks_in_khz;
num_levels       1121 drivers/gpu/drm/amd/display/dc/dce112/dce112_resource.c 			eng_clks.data[eng_clks.num_levels*3/8].clocks_in_khz;
num_levels       1125 drivers/gpu/drm/amd/display/dc/dce112/dce112_resource.c 			mem_clks.data[mem_clks.num_levels>>1].clocks_in_khz;
num_levels        858 drivers/gpu/drm/amd/display/dc/dce120/dce120_resource.c 				&eng_clks) || eng_clks.num_levels == 0) {
num_levels        860 drivers/gpu/drm/amd/display/dc/dce120/dce120_resource.c 		eng_clks.num_levels = 8;
num_levels        863 drivers/gpu/drm/amd/display/dc/dce120/dce120_resource.c 		for (i = 0; i < eng_clks.num_levels; i++) {
num_levels        871 drivers/gpu/drm/amd/display/dc/dce120/dce120_resource.c 		eng_clks.data[eng_clks.num_levels-1].clocks_in_khz, 1000);
num_levels        873 drivers/gpu/drm/amd/display/dc/dce120/dce120_resource.c 		eng_clks.data[eng_clks.num_levels/8].clocks_in_khz, 1000);
num_levels        875 drivers/gpu/drm/amd/display/dc/dce120/dce120_resource.c 		eng_clks.data[eng_clks.num_levels*2/8].clocks_in_khz, 1000);
num_levels        877 drivers/gpu/drm/amd/display/dc/dce120/dce120_resource.c 		eng_clks.data[eng_clks.num_levels*3/8].clocks_in_khz, 1000);
num_levels        879 drivers/gpu/drm/amd/display/dc/dce120/dce120_resource.c 		eng_clks.data[eng_clks.num_levels*4/8].clocks_in_khz, 1000);
num_levels        881 drivers/gpu/drm/amd/display/dc/dce120/dce120_resource.c 		eng_clks.data[eng_clks.num_levels*5/8].clocks_in_khz, 1000);
num_levels        883 drivers/gpu/drm/amd/display/dc/dce120/dce120_resource.c 		eng_clks.data[eng_clks.num_levels*6/8].clocks_in_khz, 1000);
num_levels        891 drivers/gpu/drm/amd/display/dc/dce120/dce120_resource.c 			&mem_clks) || mem_clks.num_levels == 0) {
num_levels        893 drivers/gpu/drm/amd/display/dc/dce120/dce120_resource.c 		mem_clks.num_levels = 3;
num_levels        897 drivers/gpu/drm/amd/display/dc/dce120/dce120_resource.c 		for (i = 0; i < eng_clks.num_levels; i++) {
num_levels        917 drivers/gpu/drm/amd/display/dc/dce120/dce120_resource.c 		mem_clks.data[mem_clks.num_levels>>1].clocks_in_khz * memory_type_multiplier,
num_levels        920 drivers/gpu/drm/amd/display/dc/dce120/dce120_resource.c 		mem_clks.data[mem_clks.num_levels-1].clocks_in_khz * memory_type_multiplier,
num_levels        933 drivers/gpu/drm/amd/display/dc/dce120/dce120_resource.c 			eng_clks.data[eng_clks.num_levels*3/8].clocks_in_khz - 1;
num_levels        937 drivers/gpu/drm/amd/display/dc/dce120/dce120_resource.c 			mem_clks.data[mem_clks.num_levels>>1].clocks_in_khz - 1;
num_levels        941 drivers/gpu/drm/amd/display/dc/dce120/dce120_resource.c 			eng_clks.data[eng_clks.num_levels*3/8].clocks_in_khz;
num_levels        947 drivers/gpu/drm/amd/display/dc/dce120/dce120_resource.c 			mem_clks.data[mem_clks.num_levels>>1].clocks_in_khz - 1;
num_levels        953 drivers/gpu/drm/amd/display/dc/dce120/dce120_resource.c 			eng_clks.data[eng_clks.num_levels*3/8].clocks_in_khz - 1;
num_levels        955 drivers/gpu/drm/amd/display/dc/dce120/dce120_resource.c 			mem_clks.data[mem_clks.num_levels>>1].clocks_in_khz;
num_levels        961 drivers/gpu/drm/amd/display/dc/dce120/dce120_resource.c 			eng_clks.data[eng_clks.num_levels*3/8].clocks_in_khz;
num_levels        965 drivers/gpu/drm/amd/display/dc/dce120/dce120_resource.c 			mem_clks.data[mem_clks.num_levels>>1].clocks_in_khz;
num_levels         98 drivers/gpu/drm/amd/display/dc/dm_services_types.h 	uint32_t num_levels;
num_levels        108 drivers/gpu/drm/amd/display/dc/dm_services_types.h 	uint32_t num_levels;
num_levels        118 drivers/gpu/drm/amd/display/dc/dm_services_types.h 	uint32_t num_levels;
num_levels        175 drivers/gpu/drm/amd/include/dm_pp_interface.h 	uint32_t num_levels;
num_levels        185 drivers/gpu/drm/amd/include/dm_pp_interface.h 	uint32_t num_levels;
num_levels        569 drivers/gpu/drm/amd/powerplay/arcturus_ppt.c 	clocks->num_levels = count;
num_levels        613 drivers/gpu/drm/amd/powerplay/arcturus_ppt.c 		for (i = 0; i < clocks.num_levels; i++)
num_levels        635 drivers/gpu/drm/amd/powerplay/arcturus_ppt.c 		for (i = 0; i < clocks.num_levels; i++)
num_levels        657 drivers/gpu/drm/amd/powerplay/arcturus_ppt.c 		for (i = 0; i < clocks.num_levels; i++)
num_levels       1027 drivers/gpu/drm/amd/powerplay/hwmgr/smu10_hwmgr.c 	clocks->num_levels = 0;
num_levels       1030 drivers/gpu/drm/amd/powerplay/hwmgr/smu10_hwmgr.c 			clocks->data[clocks->num_levels].clocks_in_khz =
num_levels       1032 drivers/gpu/drm/amd/powerplay/hwmgr/smu10_hwmgr.c 			clocks->data[clocks->num_levels].latency_in_us = latency_required ?
num_levels       1036 drivers/gpu/drm/amd/powerplay/hwmgr/smu10_hwmgr.c 			clocks->num_levels++;
num_levels       1081 drivers/gpu/drm/amd/powerplay/hwmgr/smu10_hwmgr.c 	clocks->num_levels = 0;
num_levels       1084 drivers/gpu/drm/amd/powerplay/hwmgr/smu10_hwmgr.c 			clocks->data[clocks->num_levels].clocks_in_khz = pclk_vol_table->entries[i].clk  * 10;
num_levels       1085 drivers/gpu/drm/amd/powerplay/hwmgr/smu10_hwmgr.c 			clocks->data[clocks->num_levels].voltage_in_mv = pclk_vol_table->entries[i].vol;
num_levels       1086 drivers/gpu/drm/amd/powerplay/hwmgr/smu10_hwmgr.c 			clocks->num_levels++;
num_levels       4217 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c 	clocks->num_levels = 0;
num_levels       4220 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c 			clocks->data[clocks->num_levels].clocks_in_khz =
num_levels       4222 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c 			clocks->num_levels++;
num_levels       4251 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c 	clocks->num_levels = data->mclk_latency_table.count = j;
num_levels       4266 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c 		clocks->num_levels++;
num_levels       4282 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c 		clocks->num_levels++;
num_levels       4343 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c 		clocks->num_levels++;
num_levels       1732 drivers/gpu/drm/amd/powerplay/hwmgr/vega12_hwmgr.c 	clocks->num_levels = ucount;
num_levels       1765 drivers/gpu/drm/amd/powerplay/hwmgr/vega12_hwmgr.c 	clocks->num_levels = data->mclk_latency_table.count = ucount;
num_levels       1793 drivers/gpu/drm/amd/powerplay/hwmgr/vega12_hwmgr.c 	clocks->num_levels = ucount;
num_levels       1821 drivers/gpu/drm/amd/powerplay/hwmgr/vega12_hwmgr.c 	clocks->num_levels = ucount;
num_levels       1857 drivers/gpu/drm/amd/powerplay/hwmgr/vega12_hwmgr.c 	clocks->num_levels = 0;
num_levels       2104 drivers/gpu/drm/amd/powerplay/hwmgr/vega12_hwmgr.c 		for (i = 0; i < clocks.num_levels; i++)
num_levels       2120 drivers/gpu/drm/amd/powerplay/hwmgr/vega12_hwmgr.c 		for (i = 0; i < clocks.num_levels; i++)
num_levels       2138 drivers/gpu/drm/amd/powerplay/hwmgr/vega12_hwmgr.c 		for (i = 0; i < clocks.num_levels; i++)
num_levels       2156 drivers/gpu/drm/amd/powerplay/hwmgr/vega12_hwmgr.c 		for (i = 0; i < clocks.num_levels; i++)
num_levels       2765 drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.c 	clocks->num_levels = count;
num_levels       2793 drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.c 	clocks->num_levels = data->mclk_latency_table.count = count;
num_levels       2818 drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.c 	clocks->num_levels = count;
num_levels       2840 drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.c 	clocks->num_levels = count;
num_levels       2882 drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.c 	clocks->num_levels = 0;
num_levels       3282 drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.c 		for (i = 0; i < clocks.num_levels; i++)
num_levels       3300 drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.c 		for (i = 0; i < clocks.num_levels; i++)
num_levels       3318 drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.c 		for (i = 0; i < clocks.num_levels; i++)
num_levels       3348 drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.c 		for (i = 0; i < clocks.num_levels; i++)
num_levels        826 drivers/gpu/drm/amd/powerplay/navi10_ppt.c 		clocks->num_levels = level_count;
num_levels        929 drivers/gpu/drm/amd/powerplay/vega20_ppt.c 	clocks->num_levels = count;
num_levels        975 drivers/gpu/drm/amd/powerplay/vega20_ppt.c 		for (i = 0; i < clocks.num_levels; i++)
num_levels        996 drivers/gpu/drm/amd/powerplay/vega20_ppt.c 		for (i = 0; i < clocks.num_levels; i++)
num_levels       1017 drivers/gpu/drm/amd/powerplay/vega20_ppt.c 		for (i = 0; i < clocks.num_levels; i++)
num_levels       1053 drivers/gpu/drm/amd/powerplay/vega20_ppt.c 		for (i = 0; i < clocks.num_levels; i++)
num_levels        656 drivers/gpu/drm/i915/display/intel_display_types.h 	u8 num_levels;
num_levels       3312 drivers/gpu/drm/i915/i915_debugfs.c 	int num_levels;
num_levels       3315 drivers/gpu/drm/i915/i915_debugfs.c 		num_levels = 3;
num_levels       3317 drivers/gpu/drm/i915/i915_debugfs.c 		num_levels = 1;
num_levels       3319 drivers/gpu/drm/i915/i915_debugfs.c 		num_levels = 3;
num_levels       3321 drivers/gpu/drm/i915/i915_debugfs.c 		num_levels = ilk_wm_max_level(dev_priv) + 1;
num_levels       3325 drivers/gpu/drm/i915/i915_debugfs.c 	for (level = 0; level < num_levels; level++) {
num_levels       3429 drivers/gpu/drm/i915/i915_debugfs.c 	int num_levels;
num_levels       3435 drivers/gpu/drm/i915/i915_debugfs.c 		num_levels = 3;
num_levels       3437 drivers/gpu/drm/i915/i915_debugfs.c 		num_levels = 1;
num_levels       3439 drivers/gpu/drm/i915/i915_debugfs.c 		num_levels = 3;
num_levels       3441 drivers/gpu/drm/i915/i915_debugfs.c 		num_levels = ilk_wm_max_level(dev_priv) + 1;
num_levels       3454 drivers/gpu/drm/i915/i915_debugfs.c 	if (ret != num_levels)
num_levels       3459 drivers/gpu/drm/i915/i915_debugfs.c 	for (level = 0; level < num_levels; level++)
num_levels       1218 drivers/gpu/drm/i915/intel_pm.c 	int num_levels = intel_wm_num_levels(to_i915(plane->base.dev));
num_levels       1230 drivers/gpu/drm/i915/intel_pm.c 	for (level = 0; level < num_levels; level++) {
num_levels       1778 drivers/gpu/drm/i915/intel_pm.c 	int num_levels = intel_wm_num_levels(dev_priv);
num_levels       1781 drivers/gpu/drm/i915/intel_pm.c 	for (; level < num_levels; level++) {
num_levels       1796 drivers/gpu/drm/i915/intel_pm.c 	int num_levels = intel_wm_num_levels(to_i915(plane->base.dev));
num_levels       1805 drivers/gpu/drm/i915/intel_pm.c 	for (level = 0; level < num_levels; level++) {
num_levels       1910 drivers/gpu/drm/i915/intel_pm.c 	wm_state->num_levels = intel_wm_num_levels(dev_priv);
num_levels       1918 drivers/gpu/drm/i915/intel_pm.c 	for (level = 0; level < wm_state->num_levels; level++) {
num_levels       1946 drivers/gpu/drm/i915/intel_pm.c 	wm_state->num_levels = level;
num_levels       2073 drivers/gpu/drm/i915/intel_pm.c 	intermediate->num_levels = min(optimal->num_levels, active->num_levels);
num_levels       2077 drivers/gpu/drm/i915/intel_pm.c 	for (level = 0; level < intermediate->num_levels; level++) {
num_levels       2124 drivers/gpu/drm/i915/intel_pm.c 		wm->level = min_t(int, wm->level, wm_state->num_levels - 1);
num_levels       6183 drivers/gpu/drm/i915/intel_pm.c 		active->num_levels = wm->level + 1;
num_levels       6186 drivers/gpu/drm/i915/intel_pm.c 		for (level = 0; level < active->num_levels; level++) {
num_levels       6246 drivers/gpu/drm/i915/intel_pm.c 		for (level = 0; level < wm_state->num_levels; level++) {
num_levels       1726 drivers/gpu/drm/radeon/kv_dpm.c 			if (table->entries[i].clk <= new_ps->levels[new_ps->num_levels - 1].sclk)
num_levels       1733 drivers/gpu/drm/radeon/kv_dpm.c 			    (table->entries[pi->lowest_valid].clk - new_ps->levels[new_ps->num_levels - 1].sclk))
num_levels       1752 drivers/gpu/drm/radeon/kv_dpm.c 			    new_ps->levels[new_ps->num_levels - 1].sclk)
num_levels       1761 drivers/gpu/drm/radeon/kv_dpm.c 			     new_ps->levels[new_ps->num_levels -1].sclk))
num_levels       2189 drivers/gpu/drm/radeon/kv_dpm.c 	for (i = 0; i < ps->num_levels; i++) {
num_levels       2195 drivers/gpu/drm/radeon/kv_dpm.c 		for (i = 0; i < ps->num_levels; i++) {
num_levels       2207 drivers/gpu/drm/radeon/kv_dpm.c 		for (i = 0; i < ps->num_levels; i++) {
num_levels       2218 drivers/gpu/drm/radeon/kv_dpm.c 		for (i = 0; i < ps->num_levels; i++) {
num_levels       2580 drivers/gpu/drm/radeon/kv_dpm.c 	ps->num_levels = 1;
num_levels       2625 drivers/gpu/drm/radeon/kv_dpm.c 	ps->num_levels = index + 1;
num_levels       2858 drivers/gpu/drm/radeon/kv_dpm.c 	for (i = 0; i < ps->num_levels; i++) {
num_levels       2892 drivers/gpu/drm/radeon/kv_dpm.c 		return requested_state->levels[requested_state->num_levels - 1].sclk;
num_levels         83 drivers/gpu/drm/radeon/kv_dpm.h 	u32 num_levels;
num_levels       1811 drivers/gpu/drm/radeon/r100.c 		track->textures[i].num_levels = ((idx_value & RADEON_MAX_MIP_LEVEL_MASK)
num_levels       2085 drivers/gpu/drm/radeon/r100.c 	DRM_ERROR("num levels                 %d\n", t->num_levels);
num_levels       2174 drivers/gpu/drm/radeon/r100.c 		for (i = 0; i <= track->textures[u].num_levels; i++) {
num_levels       2426 drivers/gpu/drm/radeon/r100.c 		track->textures[i].num_levels = 12;
num_levels         44 drivers/gpu/drm/radeon/r100_track.h 	unsigned		num_levels;
num_levels        419 drivers/gpu/drm/radeon/r200.c 		track->textures[i].num_levels = ((idx_value & R200_MAX_MIP_LEVEL_MASK)
num_levels       1076 drivers/gpu/drm/radeon/r300.c 		track->textures[i].num_levels = tmp;
num_levels       3897 drivers/gpu/drm/radeon/si_dpm.c 	u32 data, num_bits, num_levels;
num_levels       3909 drivers/gpu/drm/radeon/si_dpm.c 	num_levels = (1 << num_bits);
num_levels       3911 drivers/gpu/drm/radeon/si_dpm.c 	if (table->count != num_levels)
num_levels       3914 drivers/gpu/drm/radeon/si_dpm.c 	if (limits->count != (num_levels - 1))
num_levels        347 drivers/gpu/drm/radeon/sumo_dpm.c 	u32 highest_engine_clock = ps->levels[ps->num_levels - 1].sclk;
num_levels        354 drivers/gpu/drm/radeon/sumo_dpm.c 	for (i = 0; i < ps->num_levels - 1; i++)
num_levels        408 drivers/gpu/drm/radeon/sumo_dpm.c 	for (i = 0; i < ps->num_levels; i++) {
num_levels        409 drivers/gpu/drm/radeon/sumo_dpm.c 		asi = (i == ps->num_levels - 1) ? pi->pasi : pi->asi;
num_levels        423 drivers/gpu/drm/radeon/sumo_dpm.c 		a_t = CG_R(m_a * r[ps->num_levels - 1] / 100) |
num_levels        424 drivers/gpu/drm/radeon/sumo_dpm.c 			CG_L(m_a * l[ps->num_levels - 1] / 100);
num_levels        670 drivers/gpu/drm/radeon/sumo_dpm.c 		pi->boost_pl = new_ps->levels[new_ps->num_levels - 1];
num_levels        743 drivers/gpu/drm/radeon/sumo_dpm.c 	dpm_ctrl4 |= (1 << (new_ps->num_levels - 1));
num_levels        759 drivers/gpu/drm/radeon/sumo_dpm.c 	u32 n_current_state_levels = (old_ps == NULL) ? 1 : old_ps->num_levels;
num_levels        761 drivers/gpu/drm/radeon/sumo_dpm.c 	for (i = 0; i < new_ps->num_levels; i++) {
num_levels        766 drivers/gpu/drm/radeon/sumo_dpm.c 	for (i = new_ps->num_levels; i < n_current_state_levels; i++)
num_levels        844 drivers/gpu/drm/radeon/sumo_dpm.c 	if (new_ps->levels[new_ps->num_levels - 1].sclk >=
num_levels        845 drivers/gpu/drm/radeon/sumo_dpm.c 	    current_ps->levels[current_ps->num_levels - 1].sclk)
num_levels        862 drivers/gpu/drm/radeon/sumo_dpm.c 	if (new_ps->levels[new_ps->num_levels - 1].sclk <
num_levels        863 drivers/gpu/drm/radeon/sumo_dpm.c 	    current_ps->levels[current_ps->num_levels - 1].sclk)
num_levels       1111 drivers/gpu/drm/radeon/sumo_dpm.c 	for (i = 0; i < ps->num_levels; i++) {
num_levels       1144 drivers/gpu/drm/radeon/sumo_dpm.c 		else if (i == ps->num_levels - 1)
num_levels       1397 drivers/gpu/drm/radeon/sumo_dpm.c 	ps->num_levels = 1;
num_levels       1444 drivers/gpu/drm/radeon/sumo_dpm.c 	ps->num_levels = index + 1;
num_levels       1736 drivers/gpu/drm/radeon/sumo_dpm.c 	pi->current_ps.num_levels = 1;
num_levels       1803 drivers/gpu/drm/radeon/sumo_dpm.c 	for (i = 0; i < ps->num_levels; i++) {
num_levels       1829 drivers/gpu/drm/radeon/sumo_dpm.c 	} else if (current_index >= ps->num_levels) {
num_levels       1853 drivers/gpu/drm/radeon/sumo_dpm.c 	} else if (current_index >= ps->num_levels) {
num_levels       1889 drivers/gpu/drm/radeon/sumo_dpm.c 		return requested_state->levels[requested_state->num_levels - 1].sclk;
num_levels       1907 drivers/gpu/drm/radeon/sumo_dpm.c 	if (ps->num_levels <= 1)
num_levels       1913 drivers/gpu/drm/radeon/sumo_dpm.c 		sumo_power_level_enable(rdev, ps->num_levels - 1, true);
num_levels       1914 drivers/gpu/drm/radeon/sumo_dpm.c 		sumo_set_forced_level(rdev, ps->num_levels - 1);
num_levels       1916 drivers/gpu/drm/radeon/sumo_dpm.c 		for (i = 0; i < ps->num_levels - 1; i++) {
num_levels       1928 drivers/gpu/drm/radeon/sumo_dpm.c 		for (i = 1; i < ps->num_levels; i++) {
num_levels       1935 drivers/gpu/drm/radeon/sumo_dpm.c 		for (i = 0; i < ps->num_levels; i++) {
num_levels         47 drivers/gpu/drm/radeon/sumo_dpm.h 	u32 num_levels;
num_levels        847 drivers/gpu/drm/radeon/trinity_dpm.c 	u32 n_current_state_levels = (old_ps == NULL) ? 1 : old_ps->num_levels;
num_levels        849 drivers/gpu/drm/radeon/trinity_dpm.c 	for (i = 0; i < new_ps->num_levels; i++) {
num_levels        854 drivers/gpu/drm/radeon/trinity_dpm.c 	for (i = new_ps->num_levels; i < n_current_state_levels; i++)
num_levels        970 drivers/gpu/drm/radeon/trinity_dpm.c 	if (new_ps->levels[new_ps->num_levels - 1].sclk >=
num_levels        971 drivers/gpu/drm/radeon/trinity_dpm.c 	    current_ps->levels[current_ps->num_levels - 1].sclk)
num_levels        984 drivers/gpu/drm/radeon/trinity_dpm.c 	if (new_ps->levels[new_ps->num_levels - 1].sclk <
num_levels        985 drivers/gpu/drm/radeon/trinity_dpm.c 	    current_ps->levels[current_ps->num_levels - 1].sclk)
num_levels       1210 drivers/gpu/drm/radeon/trinity_dpm.c 	if (ps->num_levels <= 1)
num_levels       1217 drivers/gpu/drm/radeon/trinity_dpm.c 		ret = trinity_dpm_n_levels_disabled(rdev, ps->num_levels - 1);
num_levels       1221 drivers/gpu/drm/radeon/trinity_dpm.c 		for (i = 0; i < ps->num_levels; i++) {
num_levels       1329 drivers/gpu/drm/radeon/trinity_dpm.c 	ps->num_levels = 1;
num_levels       1354 drivers/gpu/drm/radeon/trinity_dpm.c 	pi->current_ps.num_levels = 1;
num_levels       1435 drivers/gpu/drm/radeon/trinity_dpm.c 	if (ps == NULL || ps->num_levels <= 1)
num_levels       1437 drivers/gpu/drm/radeon/trinity_dpm.c 	else if (ps->num_levels == 2) {
num_levels       1563 drivers/gpu/drm/radeon/trinity_dpm.c 	for (i = 0; i < ps->num_levels; i++) {
num_levels       1615 drivers/gpu/drm/radeon/trinity_dpm.c 			ps->levels[ps->num_levels - 1].allow_gnb_slow = 0;
num_levels       1722 drivers/gpu/drm/radeon/trinity_dpm.c 	ps->num_levels = index + 1;
num_levels       2021 drivers/gpu/drm/radeon/trinity_dpm.c 	for (i = 0; i < ps->num_levels; i++) {
num_levels       2041 drivers/gpu/drm/radeon/trinity_dpm.c 	if (current_index >= ps->num_levels) {
num_levels       2062 drivers/gpu/drm/radeon/trinity_dpm.c 	if (current_index >= ps->num_levels) {
num_levels       2099 drivers/gpu/drm/radeon/trinity_dpm.c 		return requested_state->levels[requested_state->num_levels - 1].sclk;
num_levels         48 drivers/gpu/drm/radeon/trinity_dpm.h 	u32 num_levels;
num_levels        806 drivers/hwmon/aspeed-pwm-tacho.c 				     u32 pwm_port, u8 num_levels)
num_levels        816 drivers/hwmon/aspeed-pwm-tacho.c 	cdev->cooling_levels = devm_kzalloc(dev, num_levels, GFP_KERNEL);
num_levels        820 drivers/hwmon/aspeed-pwm-tacho.c 	cdev->max_state = num_levels - 1;
num_levels        823 drivers/hwmon/aspeed-pwm-tacho.c 					num_levels);
num_levels        825 drivers/hwmon/npcm750-pwm-fan.c 				      u32 pwm_port, u8 num_levels)
num_levels        834 drivers/hwmon/npcm750-pwm-fan.c 	cdev->cooling_levels = devm_kzalloc(dev, num_levels, GFP_KERNEL);
num_levels        838 drivers/hwmon/npcm750-pwm-fan.c 	cdev->max_state = num_levels - 1;
num_levels        841 drivers/hwmon/npcm750-pwm-fan.c 					num_levels);
num_levels         52 drivers/net/ethernet/mellanox/mlx5/core/fs_core.c 	.num_levels = num_levels_val,\
num_levels        134 drivers/net/ethernet/mellanox/mlx5/core/fs_core.c 	int num_levels;
num_levels       1026 drivers/net/ethernet/mellanox/mlx5/core/fs_core.c 	if (ft_attr->level >= fs_prio->num_levels) {
num_levels       2155 drivers/net/ethernet/mellanox/mlx5/core/fs_core.c 				       int num_levels,
num_levels       2167 drivers/net/ethernet/mellanox/mlx5/core/fs_core.c 	fs_prio->num_levels = num_levels;
num_levels       2176 drivers/net/ethernet/mellanox/mlx5/core/fs_core.c 					      int num_levels)
num_levels       2178 drivers/net/ethernet/mellanox/mlx5/core/fs_core.c 	return _fs_create_prio(ns, prio, num_levels, FS_TYPE_PRIO_CHAINS);
num_levels       2182 drivers/net/ethernet/mellanox/mlx5/core/fs_core.c 				      unsigned int prio, int num_levels)
num_levels       2184 drivers/net/ethernet/mellanox/mlx5/core/fs_core.c 	return _fs_create_prio(ns, prio, num_levels, FS_TYPE_PRIO);
num_levels       2220 drivers/net/ethernet/mellanox/mlx5/core/fs_core.c 		fs_prio = fs_create_prio(ns, prio++, prio_metadata->num_levels);
num_levels       2266 drivers/net/ethernet/mellanox/mlx5/core/fs_core.c 		fs_prio = fs_create_prio(fs_ns, prio, init_node->num_levels);
num_levels       2354 drivers/net/ethernet/mellanox/mlx5/core/fs_core.c 		acc_level += prio->num_levels;
num_levels       2368 drivers/net/ethernet/mellanox/mlx5/core/fs_core.c 	if (!prio->num_levels)
num_levels       2369 drivers/net/ethernet/mellanox/mlx5/core/fs_core.c 		prio->num_levels = acc_level_ns - prio->start_level;
num_levels       2370 drivers/net/ethernet/mellanox/mlx5/core/fs_core.c 	WARN_ON(prio->num_levels < acc_level_ns - prio->start_level);
num_levels       2381 drivers/net/ethernet/mellanox/mlx5/core/fs_core.c 		start_level += prio->num_levels;
num_levels        212 drivers/net/ethernet/mellanox/mlx5/core/fs_core.h 	unsigned int			num_levels;
num_levels       3648 drivers/net/wireless/broadcom/brcm80211/brcmsmac/phy/phy_lcn.c wlc_lcnphy_a1(struct brcms_phy *pi, int cal_type, int num_levels,
num_levels       3701 drivers/net/wireless/broadcom/brcm80211/brcmsmac/phy/phy_lcn.c 	if (num_levels == 0) {
num_levels       3703 drivers/net/wireless/broadcom/brcm80211/brcmsmac/phy/phy_lcn.c 			num_levels = 4;
num_levels       3705 drivers/net/wireless/broadcom/brcm80211/brcmsmac/phy/phy_lcn.c 			num_levels = 9;
num_levels       3726 drivers/net/wireless/broadcom/brcm80211/brcmsmac/phy/phy_lcn.c 	for (phy_c8 = 0; phy_c7 != 0 && phy_c8 < num_levels; phy_c8++) {
num_levels        229 drivers/video/backlight/pwm_bl.c 	unsigned int num_levels = 0;
num_levels        312 drivers/video/backlight/pwm_bl.c 					num_levels += num_steps;
num_levels        314 drivers/video/backlight/pwm_bl.c 					num_levels++;
num_levels        316 drivers/video/backlight/pwm_bl.c 			num_levels++;
num_levels        318 drivers/video/backlight/pwm_bl.c 				num_levels);
num_levels        324 drivers/video/backlight/pwm_bl.c 			size = sizeof(*table) * num_levels;
num_levels        359 drivers/video/backlight/pwm_bl.c 			data->max_brightness = num_levels;
num_levels         31 fs/verity/enable.c 	if (level < params->num_levels) {
num_levels         76 fs/verity/enable.c 		if (level == params->num_levels) /* Root hash? */
num_levels        141 fs/verity/enable.c 	for (level = 0; level <= params->num_levels; level++) {
num_levels         51 fs/verity/fsverity_private.h 	unsigned int num_levels;	/* number of levels in Merkle tree */
num_levels         95 fs/verity/open.c 		if (params->num_levels >= FS_VERITY_MAX_LEVELS) {
num_levels        103 fs/verity/open.c 		params->level_start[params->num_levels++] = blocks;
num_levels        108 fs/verity/open.c 	for (level = (int)params->num_levels - 1; level >= 0; level--) {
num_levels        110 fs/verity/verify.c 	for (level = 0; level < params->num_levels; level++) {
num_levels         76 include/linux/cacheinfo.h 	unsigned int num_levels;
num_levels        201 lib/decompress_unlzma.c rc_bit_tree_decode(struct rc *rc, uint16_t *p, int num_levels, int *symbol)
num_levels        203 lib/decompress_unlzma.c 	int i = num_levels;
num_levels        208 lib/decompress_unlzma.c 	*symbol -= 1 << num_levels;