num_lanes        2889 drivers/acpi/nfit/core.c 		ndr_desc->num_lanes = nfit_mem->bdw->windows;
num_lanes          56 drivers/gpu/drm/amd/powerplay/hwmgr/pppcielanes.c uint8_t encode_pcie_lane_width(uint32_t num_lanes)
num_lanes          58 drivers/gpu/drm/amd/powerplay/hwmgr/pppcielanes.c 	return pp_r600_encode_lanes[num_lanes];
num_lanes          61 drivers/gpu/drm/amd/powerplay/hwmgr/pppcielanes.c uint8_t decode_pcie_lane_width(uint32_t num_lanes)
num_lanes          63 drivers/gpu/drm/amd/powerplay/hwmgr/pppcielanes.c 	return pp_r600_decoded_lanes[num_lanes];
num_lanes          27 drivers/gpu/drm/amd/powerplay/hwmgr/pppcielanes.h extern uint8_t encode_pcie_lane_width(uint32_t num_lanes);
num_lanes          28 drivers/gpu/drm/amd/powerplay/hwmgr/pppcielanes.h extern uint8_t decode_pcie_lane_width(uint32_t num_lanes);
num_lanes         192 drivers/gpu/drm/bridge/adv7511/adv7533.c 	u32 num_lanes;
num_lanes         194 drivers/gpu/drm/bridge/adv7511/adv7533.c 	of_property_read_u32(np, "adi,dsi-lanes", &num_lanes);
num_lanes         196 drivers/gpu/drm/bridge/adv7511/adv7533.c 	if (num_lanes < 1 || num_lanes > 4)
num_lanes         199 drivers/gpu/drm/bridge/adv7511/adv7533.c 	adv->num_dsi_lanes = num_lanes;
num_lanes         747 drivers/gpu/drm/bridge/sii902x.c 	int num_lanes, i;
num_lanes         755 drivers/gpu/drm/bridge/sii902x.c 	num_lanes = of_property_read_variable_u8_array(dev->of_node,
num_lanes         760 drivers/gpu/drm/bridge/sii902x.c 	if (num_lanes == -EINVAL) {
num_lanes         764 drivers/gpu/drm/bridge/sii902x.c 		num_lanes = 1;
num_lanes         766 drivers/gpu/drm/bridge/sii902x.c 	} else if (num_lanes < 0) {
num_lanes         769 drivers/gpu/drm/bridge/sii902x.c 			__func__, num_lanes);
num_lanes         770 drivers/gpu/drm/bridge/sii902x.c 		return num_lanes;
num_lanes         772 drivers/gpu/drm/bridge/sii902x.c 	codec_data.max_i2s_channels = 2 * num_lanes;
num_lanes         774 drivers/gpu/drm/bridge/sii902x.c 	for (i = 0; i < num_lanes; i++)
num_lanes         440 drivers/gpu/drm/bridge/tc358767.c 	if (tc->link.base.num_lanes == 2)
num_lanes         677 drivers/gpu/drm/bridge/tc358767.c 	if (tc->link.base.num_lanes > 2) {
num_lanes         679 drivers/gpu/drm/bridge/tc358767.c 		tc->link.base.num_lanes = 2;
num_lanes         701 drivers/gpu/drm/bridge/tc358767.c 		tc->link.base.num_lanes,
num_lanes         742 drivers/gpu/drm/bridge/tc358767.c 	out_bw = tc->link.base.num_lanes * tc->link.base.rate;
num_lanes         914 drivers/gpu/drm/bridge/tc358767.c 	if (tc->link.base.num_lanes == 2)
num_lanes        1102 drivers/gpu/drm/bridge/tc358767.c 	if (tc->link.base.num_lanes == 2) {
num_lanes        1299 drivers/gpu/drm/bridge/tc358767.c 	avail = tc->link.base.num_lanes * tc->link.base.rate;
num_lanes         363 drivers/gpu/drm/drm_dp_helper.c 	link->num_lanes = values[2] & DP_MAX_LANE_COUNT_MASK;
num_lanes         454 drivers/gpu/drm/drm_dp_helper.c 	values[1] = link->num_lanes;
num_lanes        1666 drivers/gpu/drm/msm/dsi/dsi_host.c 	int ret, i, len, num_lanes;
num_lanes        1675 drivers/gpu/drm/msm/dsi/dsi_host.c 	num_lanes = len / sizeof(u32);
num_lanes        1677 drivers/gpu/drm/msm/dsi/dsi_host.c 	if (num_lanes < 1 || num_lanes > 4) {
num_lanes        1682 drivers/gpu/drm/msm/dsi/dsi_host.c 	msm_host->num_data_lanes = num_lanes;
num_lanes        1685 drivers/gpu/drm/msm/dsi/dsi_host.c 					 num_lanes);
num_lanes        1706 drivers/gpu/drm/msm/dsi/dsi_host.c 		for (j = 0; j < num_lanes; j++) {
num_lanes        1715 drivers/gpu/drm/msm/dsi/dsi_host.c 		if (j == num_lanes) {
num_lanes         406 drivers/gpu/drm/msm/edp/edp_ctrl.c 	u8 max_lane = ctrl->dp_link.num_lanes;
num_lanes         704 drivers/gpu/drm/msm/edp/edp_ctrl.c 	max_lane = ctrl->dp_link.num_lanes;
num_lanes         762 drivers/gpu/drm/msm/edp/edp_ctrl.c 	dp_link.num_lanes = ctrl->lane_cnt;
num_lanes        3668 drivers/gpu/drm/omapdrm/dss/dsi.c 	int num_lanes;
num_lanes        3689 drivers/gpu/drm/omapdrm/dss/dsi.c 	num_lanes = 0;
num_lanes        3718 drivers/gpu/drm/omapdrm/dss/dsi.c 		num_lanes++;
num_lanes        3722 drivers/gpu/drm/omapdrm/dss/dsi.c 	dsi->num_lanes_used = num_lanes;
num_lanes         481 drivers/gpu/drm/rockchip/cdn-dp-core.c 	dp->link.num_lanes = 0;
num_lanes         573 drivers/gpu/drm/rockchip/cdn-dp-core.c 	if (!port || !dp->link.rate || !dp->link.num_lanes)
num_lanes         956 drivers/gpu/drm/rockchip/cdn-dp-core.c 		unsigned int lanes = dp->link.num_lanes;
num_lanes         969 drivers/gpu/drm/rockchip/cdn-dp-core.c 		    (rate != dp->link.rate || lanes != dp->link.num_lanes)) {
num_lanes         539 drivers/gpu/drm/rockchip/cdn-dp-reg.c 	dp->link.num_lanes = status[1];
num_lanes         564 drivers/gpu/drm/rockchip/cdn-dp-reg.c 			  dp->link.num_lanes);
num_lanes         662 drivers/gpu/drm/rockchip/cdn-dp-reg.c 		do_div(symbol, dp->link.num_lanes * link_rate * 8);
num_lanes         668 drivers/gpu/drm/rockchip/cdn-dp-reg.c 				      mode->clock, dp->link.num_lanes,
num_lanes         683 drivers/gpu/drm/rockchip/cdn-dp-reg.c 	val /= (dp->link.num_lanes * link_rate);
num_lanes         836 drivers/gpu/drm/rockchip/cdn-dp-reg.c 		if (dp->link.num_lanes == 1)
num_lanes         795 drivers/gpu/drm/tegra/dpaux.c 	for (i = 0; i < link->num_lanes; i++)
num_lanes         802 drivers/gpu/drm/tegra/dpaux.c 				link->num_lanes);
num_lanes         814 drivers/gpu/drm/tegra/dpaux.c 		if (!drm_dp_clock_recovery_ok(status, link->num_lanes))
num_lanes         820 drivers/gpu/drm/tegra/dpaux.c 		if (!drm_dp_channel_eq_ok(status, link->num_lanes))
num_lanes         652 drivers/gpu/drm/tegra/sor.c 	for (i = 0, value = 0; i < link->num_lanes; i++) {
num_lanes         673 drivers/gpu/drm/tegra/sor.c 	for (i = 0, value = 0; i < link->num_lanes; i++) {
num_lanes         688 drivers/gpu/drm/tegra/sor.c 	for (i = 0, value = 0; i < link->num_lanes; i++) {
num_lanes         915 drivers/gpu/drm/tegra/sor.c 	if (!link_rate || !link->num_lanes || !pclk || !config->bits_per_pixel)
num_lanes         918 drivers/gpu/drm/tegra/sor.c 	output = link_rate * 8 * link->num_lanes;
num_lanes         962 drivers/gpu/drm/tegra/sor.c 			    (link->num_lanes * 8);
num_lanes         982 drivers/gpu/drm/tegra/sor.c 	config->hblank_symbols -= 12 / link->num_lanes;
num_lanes         987 drivers/gpu/drm/tegra/sor.c 	config->vblank_symbols -= 36 / link->num_lanes + 4;
num_lanes        1833 drivers/gpu/drm/tegra/sor.c 	if (link.num_lanes <= 2)
num_lanes        1838 drivers/gpu/drm/tegra/sor.c 	if (link.num_lanes <= 1)
num_lanes        1843 drivers/gpu/drm/tegra/sor.c 	if (link.num_lanes == 0)
num_lanes        1852 drivers/gpu/drm/tegra/sor.c 	value |= SOR_DP_LINKCTL_LANE_COUNT(link.num_lanes);
num_lanes        1909 drivers/gpu/drm/tegra/sor.c 	lanes = link.num_lanes;
num_lanes        1927 drivers/gpu/drm/tegra/sor.c 	for (i = 0; i < link.num_lanes; i++) {
num_lanes         244 drivers/media/i2c/adv748x/adv748x-core.c 	adv748x_write_check(state, page, 0x00, 0x80 | tx->num_lanes, &ret);
num_lanes         247 drivers/media/i2c/adv748x/adv748x-core.c 	adv748x_write_check(state, page, 0x00, 0xa0 | tx->num_lanes, &ret);
num_lanes         273 drivers/media/i2c/adv748x/adv748x-core.c 	adv748x_write_check(state, page, 0x00, 0x20 | tx->num_lanes, &ret);
num_lanes         295 drivers/media/i2c/adv748x/adv748x-core.c 	adv748x_write_check(state, page, 0x00, 0x80 | tx->num_lanes, &ret);
num_lanes         578 drivers/media/i2c/adv748x/adv748x-core.c 	unsigned int num_lanes;
num_lanes         589 drivers/media/i2c/adv748x/adv748x-core.c 	num_lanes = vep.bus.mipi_csi2.num_data_lanes;
num_lanes         592 drivers/media/i2c/adv748x/adv748x-core.c 		if (num_lanes != 1 && num_lanes != 2 && num_lanes != 4) {
num_lanes         594 drivers/media/i2c/adv748x/adv748x-core.c 				num_lanes);
num_lanes         598 drivers/media/i2c/adv748x/adv748x-core.c 		state->txa.num_lanes = num_lanes;
num_lanes         599 drivers/media/i2c/adv748x/adv748x-core.c 		adv_dbg(state, "TXA: using %u lanes\n", state->txa.num_lanes);
num_lanes         603 drivers/media/i2c/adv748x/adv748x-core.c 		if (num_lanes != 1) {
num_lanes         605 drivers/media/i2c/adv748x/adv748x-core.c 				num_lanes);
num_lanes         609 drivers/media/i2c/adv748x/adv748x-core.c 		state->txb.num_lanes = num_lanes;
num_lanes         610 drivers/media/i2c/adv748x/adv748x-core.c 		adv_dbg(state, "TXB: using %u lanes\n", state->txb.num_lanes);
num_lanes          81 drivers/media/i2c/adv748x/adv748x.h 	unsigned int num_lanes;
num_lanes          74 drivers/media/platform/cadence/cdns-csi2rx.c 	u8				num_lanes;
num_lanes         118 drivers/media/platform/cadence/cdns-csi2rx.c 	reg = csi2rx->num_lanes << 8;
num_lanes         119 drivers/media/platform/cadence/cdns-csi2rx.c 	for (i = 0; i < csi2rx->num_lanes; i++) {
num_lanes         130 drivers/media/platform/cadence/cdns-csi2rx.c 	for (i = csi2rx->num_lanes; i < csi2rx->max_lanes; i++) {
num_lanes         390 drivers/media/platform/cadence/cdns-csi2rx.c 	csi2rx->num_lanes = v4l2_ep.bus.mipi_csi2.num_data_lanes;
num_lanes         391 drivers/media/platform/cadence/cdns-csi2rx.c 	if (csi2rx->num_lanes > csi2rx->max_lanes) {
num_lanes         393 drivers/media/platform/cadence/cdns-csi2rx.c 			csi2rx->num_lanes);
num_lanes         465 drivers/media/platform/cadence/cdns-csi2rx.c 		 csi2rx->num_lanes, csi2rx->max_lanes, csi2rx->max_streams,
num_lanes         115 drivers/media/platform/cadence/cdns-csi2tx.c 	unsigned int			num_lanes;
num_lanes         251 drivers/media/platform/cadence/cdns-csi2tx.c 	for (i = 0; i < csi2tx->num_lanes; i++)
num_lanes         273 drivers/media/platform/cadence/cdns-csi2tx.c 	for (i = 0; i < csi2tx->num_lanes; i++)
num_lanes         515 drivers/media/platform/cadence/cdns-csi2tx.c 	csi2tx->num_lanes = v4l2_ep.bus.mipi_csi2.num_data_lanes;
num_lanes         516 drivers/media/platform/cadence/cdns-csi2tx.c 	if (csi2tx->num_lanes > csi2tx->max_lanes) {
num_lanes         523 drivers/media/platform/cadence/cdns-csi2tx.c 	for (i = 0; i < csi2tx->num_lanes; i++) {
num_lanes         623 drivers/media/platform/cadence/cdns-csi2tx.c 		 csi2tx->num_lanes, csi2tx->max_lanes, csi2tx->max_streams,
num_lanes         216 drivers/media/platform/exynos4-is/mipi-csis.c 	u32 num_lanes;
num_lanes         322 drivers/media/platform/exynos4-is/mipi-csis.c 		mask = (1 << (state->num_lanes + 1)) - 1;
num_lanes         360 drivers/media/platform/exynos4-is/mipi-csis.c 	val = (val & ~S5PCSIS_CFG_NR_LANE_MASK) | (state->num_lanes - 1);
num_lanes         751 drivers/media/platform/exynos4-is/mipi-csis.c 	state->num_lanes = endpoint.bus.mipi_csi2.num_data_lanes;
num_lanes         790 drivers/media/platform/exynos4-is/mipi-csis.c 	if (state->num_lanes == 0 || state->num_lanes > state->max_num_lanes) {
num_lanes         792 drivers/media/platform/exynos4-is/mipi-csis.c 			state->num_lanes, state->max_num_lanes);
num_lanes         874 drivers/media/platform/exynos4-is/mipi-csis.c 		 state->num_lanes, state->hs_settle, state->wclk_ext,
num_lanes         483 drivers/media/platform/qcom/camss/camss-csid.c 			u8 num_lanes = csid->phy.lane_cnt;
num_lanes         485 drivers/media/platform/qcom/camss/camss-csid.c 							(2 * num_lanes * 4);
num_lanes          60 drivers/media/platform/qcom/camss/camss-csiphy-2ph-1-0.c static u8 csiphy_settle_cnt_calc(u32 pixel_clock, u8 bpp, u8 num_lanes,
num_lanes          71 drivers/media/platform/qcom/camss/camss-csiphy-2ph-1-0.c 	mipi_clock = pixel_clock * bpp / (2 * num_lanes);
num_lanes         114 drivers/media/platform/qcom/camss/camss-csiphy-3ph-1-0.c static u8 csiphy_settle_cnt_calc(u32 pixel_clock, u8 bpp, u8 num_lanes,
num_lanes         124 drivers/media/platform/qcom/camss/camss-csiphy-3ph-1-0.c 	mipi_clock = pixel_clock * bpp / (2 * num_lanes);
num_lanes         122 drivers/media/platform/qcom/camss/camss-csiphy.c 			u8 num_lanes = csiphy->cfg.csi2->lane_cfg.num_data;
num_lanes         123 drivers/media/platform/qcom/camss/camss-csiphy.c 			u64 min_rate = pixel_clock * bpp / (2 * num_lanes * 4);
num_lanes        2087 drivers/net/ethernet/pensando/ionic/ionic_if.h 		u8     num_lanes;
num_lanes         152 drivers/nvdimm/nd.h 	int id, num_lanes, ro, numa_node, target_node;
num_lanes          19 drivers/nvdimm/region.c 	if (nd_region->num_lanes > num_online_cpus()
num_lanes          20 drivers/nvdimm/region.c 			&& nd_region->num_lanes < num_possible_cpus()
num_lanes          23 drivers/nvdimm/region.c 				num_online_cpus(), nd_region->num_lanes,
num_lanes          26 drivers/nvdimm/region.c 				nd_region->num_lanes);
num_lanes         902 drivers/nvdimm/region_devs.c 	if (nd_region->num_lanes < nr_cpu_ids) {
num_lanes         905 drivers/nvdimm/region_devs.c 		lane = cpu % nd_region->num_lanes;
num_lanes         919 drivers/nvdimm/region_devs.c 	if (nd_region->num_lanes < nr_cpu_ids) {
num_lanes        1020 drivers/nvdimm/region_devs.c 	nd_region->num_lanes = ndr_desc->num_lanes;
num_lanes        1056 drivers/nvdimm/region_devs.c 	ndr_desc->num_lanes = ND_MAX_LANES;
num_lanes        1067 drivers/nvdimm/region_devs.c 	ndr_desc->num_lanes = min(ndr_desc->num_lanes, ND_MAX_LANES);
num_lanes        1076 drivers/nvdimm/region_devs.c 	ndr_desc->num_lanes = ND_MAX_LANES;
num_lanes         125 drivers/pci/controller/dwc/pci-keystone.c 	int			num_lanes;
num_lanes        1024 drivers/pci/controller/dwc/pci-keystone.c 	int num_lanes = ks_pcie->num_lanes;
num_lanes        1026 drivers/pci/controller/dwc/pci-keystone.c 	while (num_lanes--) {
num_lanes        1027 drivers/pci/controller/dwc/pci-keystone.c 		phy_power_off(ks_pcie->phy[num_lanes]);
num_lanes        1028 drivers/pci/controller/dwc/pci-keystone.c 		phy_exit(ks_pcie->phy[num_lanes]);
num_lanes        1036 drivers/pci/controller/dwc/pci-keystone.c 	int num_lanes = ks_pcie->num_lanes;
num_lanes        1038 drivers/pci/controller/dwc/pci-keystone.c 	for (i = 0; i < num_lanes; i++) {
num_lanes        1204 drivers/pci/controller/dwc/pci-keystone.c 	u32 num_lanes;
num_lanes        1263 drivers/pci/controller/dwc/pci-keystone.c 	ret = of_property_read_u32(np, "num-lanes", &num_lanes);
num_lanes        1265 drivers/pci/controller/dwc/pci-keystone.c 		num_lanes = 1;
num_lanes        1267 drivers/pci/controller/dwc/pci-keystone.c 	phy = devm_kzalloc(dev, sizeof(*phy) * num_lanes, GFP_KERNEL);
num_lanes        1271 drivers/pci/controller/dwc/pci-keystone.c 	link = devm_kzalloc(dev, sizeof(*link) * num_lanes, GFP_KERNEL);
num_lanes        1275 drivers/pci/controller/dwc/pci-keystone.c 	for (i = 0; i < num_lanes; i++) {
num_lanes        1296 drivers/pci/controller/dwc/pci-keystone.c 	ks_pcie->num_lanes = num_lanes;
num_lanes        1414 drivers/pci/controller/dwc/pci-keystone.c 	int num_lanes = ks_pcie->num_lanes;
num_lanes        1420 drivers/pci/controller/dwc/pci-keystone.c 	while (num_lanes--)
num_lanes        1421 drivers/pci/controller/dwc/pci-keystone.c 		device_link_del(link[num_lanes]);
num_lanes         271 drivers/pci/controller/dwc/pcie-tegra194.c 	u32 num_lanes;
num_lanes         681 drivers/pci/controller/dwc/pcie-tegra194.c 	for (i = 0; i < pcie->num_lanes; i++) {
num_lanes         778 drivers/pci/controller/dwc/pcie-tegra194.c 	val |= (pcie->num_lanes << PCI_EXP_LNKSTA_NLW_SHIFT);
num_lanes         960 drivers/pci/controller/dwc/pcie-tegra194.c 	ret = of_property_read_u32(np, "num-lanes", &pcie->num_lanes);
num_lanes         107 drivers/phy/cadence/phy-cadence-dp.c 	u32 num_lanes; /* Number of lanes to use */
num_lanes         151 drivers/phy/cadence/phy-cadence-dp.c 	if (cdns_phy->num_lanes >= 2) {
num_lanes         156 drivers/phy/cadence/phy-cadence-dp.c 		if (cdns_phy->num_lanes == 4) {
num_lanes         169 drivers/phy/cadence/phy-cadence-dp.c 	if (cdns_phy->num_lanes >= 2) {
num_lanes         172 drivers/phy/cadence/phy-cadence-dp.c 		if (cdns_phy->num_lanes == 4) {
num_lanes         186 drivers/phy/cadence/phy-cadence-dp.c 	lane_bits = (1 << cdns_phy->num_lanes) - 1;
num_lanes         225 drivers/phy/cadence/phy-cadence-dp.c 	for (i = 0; i < cdns_phy->num_lanes; i++)
num_lanes         341 drivers/phy/cadence/phy-cadence-dp.c 	for (i = 0; i < cdns_phy->num_lanes; i++) {
num_lanes         384 drivers/phy/cadence/phy-cadence-dp.c 	switch (cdns_phy->num_lanes) {
num_lanes         473 drivers/phy/cadence/phy-cadence-dp.c 				       &(cdns_phy->num_lanes));
num_lanes         475 drivers/phy/cadence/phy-cadence-dp.c 		cdns_phy->num_lanes = DEFAULT_NUM_LANES;
num_lanes         477 drivers/phy/cadence/phy-cadence-dp.c 	switch (cdns_phy->num_lanes) {
num_lanes         485 drivers/phy/cadence/phy-cadence-dp.c 			cdns_phy->num_lanes);
num_lanes         515 drivers/phy/cadence/phy-cadence-dp.c 		 cdns_phy->num_lanes,
num_lanes          71 drivers/phy/cadence/phy-cadence-sierra.c 	u32 num_lanes;
num_lanes         118 drivers/phy/cadence/phy-cadence-sierra.c 	for (i = 0; i < ins->num_lanes; i++)
num_lanes         151 drivers/phy/cadence/phy-cadence-sierra.c 	if (of_property_read_u32(child, "cdns,num-lanes", &inst->num_lanes))
num_lanes         661 drivers/phy/tegra/xusb-tegra124.c 	.num_lanes = ARRAY_SIZE(tegra124_usb2_lanes),
num_lanes         796 drivers/phy/tegra/xusb-tegra124.c 	.num_lanes = ARRAY_SIZE(tegra124_ulpi_lanes),
num_lanes        1012 drivers/phy/tegra/xusb-tegra124.c 	.num_lanes = ARRAY_SIZE(tegra124_hsic_lanes),
num_lanes        1200 drivers/phy/tegra/xusb-tegra124.c 	.num_lanes = ARRAY_SIZE(tegra124_pcie_lanes),
num_lanes        1396 drivers/phy/tegra/xusb-tegra124.c 	.num_lanes = ARRAY_SIZE(tegra124_sata_lanes),
num_lanes         514 drivers/phy/tegra/xusb-tegra186.c 	.num_lanes = ARRAY_SIZE(tegra186_usb2_lanes),
num_lanes         776 drivers/phy/tegra/xusb-tegra186.c 	.num_lanes = ARRAY_SIZE(tegra186_usb3_lanes),
num_lanes        1147 drivers/phy/tegra/xusb-tegra210.c 	.num_lanes = ARRAY_SIZE(tegra210_usb2_lanes),
num_lanes        1401 drivers/phy/tegra/xusb-tegra210.c 	.num_lanes = ARRAY_SIZE(tegra210_hsic_lanes),
num_lanes        1585 drivers/phy/tegra/xusb-tegra210.c 	.num_lanes = ARRAY_SIZE(tegra210_pcie_lanes),
num_lanes        1749 drivers/phy/tegra/xusb-tegra210.c 	.num_lanes = ARRAY_SIZE(tegra210_sata_lanes),
num_lanes          34 drivers/phy/tegra/xusb.c 	for (i = 0; i < pad->soc->num_lanes; i++) {
num_lanes         187 drivers/phy/tegra/xusb.c 	pad->lanes = devm_kcalloc(&pad->dev, pad->soc->num_lanes, sizeof(lane),
num_lanes         194 drivers/phy/tegra/xusb.c 	for (i = 0; i < pad->soc->num_lanes; i++) {
num_lanes         242 drivers/phy/tegra/xusb.c 	unsigned int i = pad->soc->num_lanes;
num_lanes         329 drivers/phy/tegra/xusb.c 	for (i = 0; i < pad->soc->num_lanes; i++) {
num_lanes         147 drivers/phy/tegra/xusb.h 	unsigned int num_lanes;
num_lanes          62 drivers/pinctrl/tegra/pinctrl-tegra-xusb.c 	unsigned int num_lanes;
num_lanes         858 drivers/pinctrl/tegra/pinctrl-tegra-xusb.c 	.num_lanes = ARRAY_SIZE(tegra124_lanes),
num_lanes         364 drivers/staging/greybus/camera.c 	__u8 num_lanes;
num_lanes         420 drivers/staging/greybus/camera.c 	csi_cfg.num_lanes = GB_CAMERA_CSI_NUM_DATA_LANES;
num_lanes         445 drivers/staging/greybus/camera.c 		csi_params->num_lanes = csi_cfg.num_lanes;
num_lanes          45 drivers/staging/greybus/gb-camera.h 	unsigned int num_lanes;
num_lanes        3745 drivers/video/fbdev/omap2/omapfb/dss/dsi.c 	int num_lanes;
num_lanes        3766 drivers/video/fbdev/omap2/omapfb/dss/dsi.c 	num_lanes = 0;
num_lanes        3795 drivers/video/fbdev/omap2/omapfb/dss/dsi.c 		num_lanes++;
num_lanes        3799 drivers/video/fbdev/omap2/omapfb/dss/dsi.c 	dsi->num_lanes_used = num_lanes;
num_lanes        1364 include/drm/drm_dp_helper.h 	unsigned int num_lanes;
num_lanes         128 include/linux/libnvdimm.h 	int num_lanes;