num_ibrs          433 arch/ia64/kernel/perfmon.c 	unsigned int  num_ibrs;		/* number of IBRS: computed at init time */
num_ibrs         1032 arch/ia64/kernel/perfmon.c 		pfm_restore_ibrs(ctx->ctx_ibrs, pmu_conf->num_ibrs);
num_ibrs         3722 arch/ia64/kernel/perfmon.c 		for (i=0; i < pmu_conf->num_ibrs; i++) {
num_ibrs         4297 arch/ia64/kernel/perfmon.c 			pfm_restore_ibrs(ctx->ctx_ibrs, pmu_conf->num_ibrs);
num_ibrs         5981 arch/ia64/kernel/perfmon.c 		pfm_restore_ibrs(ctx->ctx_ibrs, pmu_conf->num_ibrs);
num_ibrs         6115 arch/ia64/kernel/perfmon.c 		pfm_restore_ibrs(ctx->ctx_ibrs, pmu_conf->num_ibrs);
num_ibrs         6518 arch/ia64/kernel/perfmon.c 		if (pmu_conf->num_ibrs > IA64_NUM_DBG_REGS) {
num_ibrs         6519 arch/ia64/kernel/perfmon.c 			printk(KERN_INFO "perfmon: unsupported number of code debug registers (%u)\n", pmu_conf->num_ibrs);
num_ibrs         6524 arch/ia64/kernel/perfmon.c 			printk(KERN_INFO "perfmon: unsupported number of data debug registers (%u)\n", pmu_conf->num_ibrs);
num_ibrs           41 arch/ia64/kernel/perfmon_generic.h 	.num_ibrs   = 0, /* does not use */
num_ibrs          111 arch/ia64/kernel/perfmon_itanium.h 	.num_ibrs      = 8,
num_ibrs          183 arch/ia64/kernel/perfmon_mckinley.h 	.num_ibrs       = 8,
num_ibrs          267 arch/ia64/kernel/perfmon_montecito.h 	.num_ibrs        = 8,