num_engines 205 drivers/crypto/qat/qat_c3xxx/adf_c3xxx_hw_data.c hw_data->num_engines = ADF_C3XXX_MAX_ACCELENGINES; num_engines 118 drivers/crypto/qat/qat_c3xxxvf/adf_c3xxxvf_hw_data.c hw_data->num_engines = ADF_C3XXXIOV_MAX_ACCELENGINES; num_engines 215 drivers/crypto/qat/qat_c62x/adf_c62x_hw_data.c hw_data->num_engines = ADF_C62X_MAX_ACCELENGINES; num_engines 118 drivers/crypto/qat/qat_c62xvf/adf_c62xvf_hw_data.c hw_data->num_engines = ADF_C62XIOV_MAX_ACCELENGINES; num_engines 193 drivers/crypto/qat/qat_common/adf_accel_devices.h uint8_t num_engines; num_engines 208 drivers/crypto/qat/qat_common/adf_accel_devices.h #define GET_MAX_ACCELENGINES(accel_dev) (GET_HW_DATA(accel_dev)->num_engines) num_engines 93 drivers/crypto/qat/qat_common/adf_hw_arbiter.c for (i = 0; i < hw_data->num_engines; i++) num_engines 102 drivers/crypto/qat/qat_common/adf_hw_arbiter.c for (i = 0; i < hw_data->num_engines; i++) num_engines 132 drivers/crypto/qat/qat_common/adf_hw_arbiter.c for (i = 0; i < hw_data->num_engines; i++) num_engines 136 drivers/crypto/qat/qat_common/adf_hw_arbiter.c for (i = 0; i < hw_data->num_engines; i++) num_engines 228 drivers/crypto/qat/qat_dh895xcc/adf_dh895xcc_hw_data.c hw_data->num_engines = ADF_DH895XCC_MAX_ACCELENGINES; num_engines 118 drivers/crypto/qat/qat_dh895xccvf/adf_dh895xccvf_hw_data.c hw_data->num_engines = ADF_DH895XCCIOV_MAX_ACCELENGINES; num_engines 274 drivers/gpu/drm/i915/gem/i915_gem_context.c __free_engines(e, e->num_engines); num_engines 304 drivers/gpu/drm/i915/gem/i915_gem_context.c e->num_engines = id + 1; num_engines 1384 drivers/gpu/drm/i915/gem/i915_gem_context.c if (idx >= set->engines->num_engines) { num_engines 1386 drivers/gpu/drm/i915/gem/i915_gem_context.c idx, set->engines->num_engines); num_engines 1390 drivers/gpu/drm/i915/gem/i915_gem_context.c idx = array_index_nospec(idx, set->engines->num_engines); num_engines 1469 drivers/gpu/drm/i915/gem/i915_gem_context.c if (idx >= set->engines->num_engines) { num_engines 1471 drivers/gpu/drm/i915/gem/i915_gem_context.c idx, set->engines->num_engines); num_engines 1475 drivers/gpu/drm/i915/gem/i915_gem_context.c idx = array_index_nospec(idx, set->engines->num_engines); num_engines 1549 drivers/gpu/drm/i915/gem/i915_gem_context.c unsigned int num_engines, n; num_engines 1576 drivers/gpu/drm/i915/gem/i915_gem_context.c num_engines = (args->size - sizeof(*user)) / sizeof(*user->engines); num_engines 1578 drivers/gpu/drm/i915/gem/i915_gem_context.c set.engines = kmalloc(struct_size(set.engines, engines, num_engines), num_engines 1584 drivers/gpu/drm/i915/gem/i915_gem_context.c for (n = 0; n < num_engines; n++) { num_engines 1618 drivers/gpu/drm/i915/gem/i915_gem_context.c set.engines->num_engines = num_engines; num_engines 1651 drivers/gpu/drm/i915/gem/i915_gem_context.c copy = kmalloc(struct_size(e, engines, e->num_engines), GFP_KERNEL); num_engines 1656 drivers/gpu/drm/i915/gem/i915_gem_context.c for (n = 0; n < e->num_engines; n++) { num_engines 1662 drivers/gpu/drm/i915/gem/i915_gem_context.c copy->num_engines = n; num_engines 1689 drivers/gpu/drm/i915/gem/i915_gem_context.c count = e->num_engines; num_engines 1859 drivers/gpu/drm/i915/gem/i915_gem_context.c clone = kmalloc(struct_size(e, engines, e->num_engines), GFP_KERNEL); num_engines 1864 drivers/gpu/drm/i915/gem/i915_gem_context.c for (n = 0; n < e->num_engines; n++) { num_engines 1892 drivers/gpu/drm/i915/gem/i915_gem_context.c clone->num_engines = n; num_engines 1933 drivers/gpu/drm/i915/gem/i915_gem_context.c if (e->num_engines != clone->num_engines) { num_engines 1938 drivers/gpu/drm/i915/gem/i915_gem_context.c for (n = 0; n < e->num_engines; n++) { num_engines 2374 drivers/gpu/drm/i915/gem/i915_gem_context.c if (it->idx >= e->num_engines) num_engines 205 drivers/gpu/drm/i915/gem/i915_gem_context.h if (likely(idx < e->num_engines && e->engines[idx])) num_engines 34 drivers/gpu/drm/i915/gem/i915_gem_context_types.h unsigned int num_engines; num_engines 1120 drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c ndwords, RUNTIME_INFO(i915)->num_engines); num_engines 1456 drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c count, RUNTIME_INFO(i915)->num_engines); num_engines 432 drivers/gpu/drm/i915/gt/intel_engine_cs.c RUNTIME_INFO(i915)->num_engines = hweight32(mask); num_engines 1577 drivers/gpu/drm/i915/gt/intel_ringbuffer.c const int num_engines = num_engines 1578 drivers/gpu/drm/i915/gt/intel_ringbuffer.c IS_HASWELL(i915) ? RUNTIME_INFO(i915)->num_engines - 1 : 0; num_engines 1593 drivers/gpu/drm/i915/gt/intel_ringbuffer.c len += 2 + (num_engines ? 4 * num_engines + 6 : 0); num_engines 1610 drivers/gpu/drm/i915/gt/intel_ringbuffer.c if (num_engines) { num_engines 1613 drivers/gpu/drm/i915/gt/intel_ringbuffer.c *cs++ = MI_LOAD_REGISTER_IMM(num_engines); num_engines 1663 drivers/gpu/drm/i915/gt/intel_ringbuffer.c if (num_engines) { num_engines 1667 drivers/gpu/drm/i915/gt/intel_ringbuffer.c *cs++ = MI_LOAD_REGISTER_IMM(num_engines); num_engines 211 drivers/gpu/drm/i915/gt/selftest_lrc.c 2 * RUNTIME_INFO(outer->i915)->num_engines * (count + 2) * (count + 3)) < 0) { num_engines 1555 drivers/gpu/drm/i915/gt/selftest_lrc.c RUNTIME_INFO(smoke->i915)->num_engines, smoke->ncontext); num_engines 1583 drivers/gpu/drm/i915/gt/selftest_lrc.c RUNTIME_INFO(smoke->i915)->num_engines, smoke->ncontext); num_engines 114 drivers/gpu/drm/i915/i915_query.c RUNTIME_INFO(i915)->num_engines * num_engines 121 drivers/gpu/drm/i915/i915_query.c if (query.num_engines || query.rsvd[0] || query.rsvd[1] || num_engines 135 drivers/gpu/drm/i915/i915_query.c query.num_engines++; num_engines 207 drivers/gpu/drm/i915/intel_device_info.h u8 num_engines; num_engines 1220 drivers/gpu/drm/i915/selftests/i915_request.c num_waits, num_fences, RUNTIME_INFO(i915)->num_engines, ncpus); num_engines 176 drivers/gpu/drm/omapdrm/omap_dmm_priv.h int num_engines; num_engines 292 drivers/gpu/drm/omapdrm/omap_dmm_tiler.c for (i = 0; i < dmm->num_engines; i++) { num_engines 763 drivers/gpu/drm/omapdrm/omap_dmm_tiler.c REFILL_BUFFER_SIZE * omap_dmm->num_engines, num_engines 849 drivers/gpu/drm/omapdrm/omap_dmm_tiler.c omap_dmm->num_engines = (hwinfo >> 24) & 0x1F; num_engines 854 drivers/gpu/drm/omapdrm/omap_dmm_tiler.c atomic_set(&omap_dmm->engine_counter, omap_dmm->num_engines); num_engines 890 drivers/gpu/drm/omapdrm/omap_dmm_tiler.c REFILL_BUFFER_SIZE * omap_dmm->num_engines, num_engines 898 drivers/gpu/drm/omapdrm/omap_dmm_tiler.c omap_dmm->engines = kcalloc(omap_dmm->num_engines, num_engines 905 drivers/gpu/drm/omapdrm/omap_dmm_tiler.c for (i = 0; i < omap_dmm->num_engines; i++) { num_engines 1294 drivers/infiniband/hw/hfi1/sdma.c void sdma_clean(struct hfi1_devdata *dd, size_t num_engines) num_engines 1313 drivers/infiniband/hw/hfi1/sdma.c for (i = 0; dd->per_sdma && i < num_engines; ++i) { num_engines 1368 drivers/infiniband/hw/hfi1/sdma.c size_t num_engines = chip_sdma_engines(dd); num_engines 1380 drivers/infiniband/hw/hfi1/sdma.c num_engines = mod_num_sdma; num_engines 1388 drivers/infiniband/hw/hfi1/sdma.c chip_sdma_mem_size(dd) / (num_engines * SDMA_BLOCK_SIZE); num_engines 1396 drivers/infiniband/hw/hfi1/sdma.c num_engines, descq_cnt); num_engines 1399 drivers/infiniband/hw/hfi1/sdma.c dd->per_sdma = kcalloc_node(num_engines, sizeof(*dd->per_sdma), num_engines 1416 drivers/infiniband/hw/hfi1/sdma.c for (this_idx = 0; this_idx < num_engines; ++this_idx) { num_engines 1483 drivers/infiniband/hw/hfi1/sdma.c dd->sdma_heads_size = L1_CACHE_BYTES * num_engines; num_engines 1504 drivers/infiniband/hw/hfi1/sdma.c for (this_idx = 0; this_idx < num_engines; ++this_idx) { num_engines 1518 drivers/infiniband/hw/hfi1/sdma.c dd->num_sdma = num_engines; num_engines 1541 drivers/infiniband/hw/hfi1/sdma.c sdma_clean(dd, num_engines); num_engines 415 drivers/infiniband/hw/hfi1/sdma.h void sdma_clean(struct hfi1_devdata *dd, size_t num_engines); num_engines 764 drivers/net/ethernet/qlogic/qed/qed.h u8 num_engines; num_engines 2117 include/uapi/drm/i915_drm.h __u32 num_engines; num_engines 2117 tools/include/uapi/drm/i915_drm.h __u32 num_engines;