num_chans        2784 drivers/dma/ste_dma40.c 				 int num_chans)
num_chans        2791 drivers/dma/ste_dma40.c 	for (i = offset; i < offset + num_chans; i++) {
num_chans         175 drivers/edac/cell_edac.c 	int				rc, chanmask, num_chans;
num_chans         200 drivers/edac/cell_edac.c 	num_chans = chanmask == 3 ? 2 : 1;
num_chans         206 drivers/edac/cell_edac.c 	layers[1].size = num_chans;
num_chans         249 drivers/firmware/arm_scpi.c 	int num_chans;
num_chans         488 drivers/firmware/arm_scpi.c 			scpi_info->num_chans;
num_chans         857 drivers/firmware/arm_scpi.c 	for (i = 0; i < info->num_chans; i++)
num_chans         929 drivers/firmware/arm_scpi.c 	for (; scpi_info->num_chans < count; scpi_info->num_chans++) {
num_chans         931 drivers/firmware/arm_scpi.c 		int idx = scpi_info->num_chans;
num_chans         137 drivers/firmware/stratix10-svc.c 	int num_chans;
num_chans         998 drivers/firmware/stratix10-svc.c 	controller->num_chans = SVC_NUM_CHANNEL;
num_chans          69 drivers/gpu/drm/amd/amdgpu/amdgpu_socbb.h 	uint32_t num_chans;
num_chans        1716 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c 	dc->dml.soc.num_chans = dc->dcn_soc->number_of_channels;
num_chans         125 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_resource.c 	.num_chans = 2,
num_chans         260 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c 	.num_chans = 16,
num_chans         371 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c 	.num_chans = 8,
num_chans        3348 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c 		dcn2_0_nv12_soc.num_chans =
num_chans        3349 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c 				le32_to_cpu(bb->num_chans);
num_chans         258 drivers/gpu/drm/amd/display/dc/dcn21/dcn21_resource.c 	.num_chans = 4,
num_chans        1282 drivers/gpu/drm/amd/display/dc/dcn21/dcn21_resource.c 	dcn2_1_soc.num_chans = bw_params->num_channels;
num_chans          99 drivers/gpu/drm/amd/display/dc/dml/display_mode_structs.h 	unsigned int num_chans;
num_chans         200 drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.c 	mode_lib->vba.NumberOfChannels = soc->num_chans;
num_chans         136 drivers/mailbox/arm_mhu.c 	mhu->mbox.num_chans = MHU_CHANS;
num_chans         178 drivers/mailbox/armada-37xx-rwtm-mailbox.c 	mbox->controller.num_chans = 1;
num_chans        1464 drivers/mailbox/bcm-flexrm-mailbox.c 	if (pa->args[0] >= cntlr->num_chans)
num_chans        1638 drivers/mailbox/bcm-flexrm-mailbox.c 	mbox->controller.num_chans = mbox->num_rings;
num_chans        1655 drivers/mailbox/bcm-flexrm-mailbox.c 			mbox->controller.num_chans);
num_chans        1447 drivers/mailbox/bcm-pdc-mailbox.c 	mbc->num_chans = 1;
num_chans        1448 drivers/mailbox/bcm-pdc-mailbox.c 	mbc->chans = devm_kcalloc(dev, mbc->num_chans, sizeof(*mbc->chans),
num_chans        1456 drivers/mailbox/bcm-pdc-mailbox.c 	for (chan_index = 0; chan_index < mbc->num_chans; chan_index++)
num_chans         169 drivers/mailbox/bcm2835-mailbox.c 	mbox->controller.num_chans = 1;
num_chans         259 drivers/mailbox/hi3660-mailbox.c 	mbox->controller.num_chans = MBOX_CHAN_MAX;
num_chans         314 drivers/mailbox/hi6220-mailbox.c 	mbox->controller.num_chans = mbox->chan_num;
num_chans         259 drivers/mailbox/imx-mailbox.c 	if (chan >= mbox->num_chans) {
num_chans         330 drivers/mailbox/imx-mailbox.c 	priv->mbox.num_chans = IMX_MU_CHANS;
num_chans         320 drivers/mailbox/mailbox-altera.c 	mbox->controller.num_chans = 1;
num_chans         104 drivers/mailbox/mailbox-sti.c 	for (i = 0; i < mbox->num_chans; i++) {
num_chans         306 drivers/mailbox/mailbox-sti.c 	for (i = 0; i < mbox->num_chans; i++)
num_chans         310 drivers/mailbox/mailbox-sti.c 	if (mbox->num_chans == i) {
num_chans         340 drivers/mailbox/mailbox-sti.c 	for (i = 0; i < mbox->num_chans; i++) {
num_chans         459 drivers/mailbox/mailbox-sti.c 	mbox->num_chans		= STI_MBOX_CHAN_MAX;
num_chans         212 drivers/mailbox/mailbox-xgene-slimpro.c 	ctx->mb_ctrl.num_chans = i;
num_chans         121 drivers/mailbox/mailbox.c 	for (i = 0; i < mbox->num_chans; i++) {
num_chans         464 drivers/mailbox/mailbox.c 	if (ind >= mbox->num_chans)
num_chans         481 drivers/mailbox/mailbox.c 	if (!mbox || !mbox->dev || !mbox->ops || !mbox->num_chans)
num_chans         503 drivers/mailbox/mailbox.c 	for (i = 0; i < mbox->num_chans; i++) {
num_chans         538 drivers/mailbox/mailbox.c 	for (i = 0; i < mbox->num_chans; i++)
num_chans         447 drivers/mailbox/mtk-cmdq-mailbox.c 	if (ind >= mbox->num_chans)
num_chans         506 drivers/mailbox/mtk-cmdq-mailbox.c 	cmdq->mbox.num_chans = cmdq->thread_nr;
num_chans         848 drivers/mailbox/omap-mailbox.c 	mdev->controller.num_chans = info_count;
num_chans          85 drivers/mailbox/pcc.c 	if (id < 0 || id >= pcc_mbox_ctrl.num_chans)
num_chans         294 drivers/mailbox/pcc.c 	if (id >= pcc_mbox_ctrl.num_chans) {
num_chans         334 drivers/mailbox/pcc.c 	if (id >= pcc_mbox_ctrl.num_chans) {
num_chans         524 drivers/mailbox/pcc.c 	pcc_mbox_ctrl.num_chans = count;
num_chans         526 drivers/mailbox/pcc.c 	pr_info("Detected %d PCC Subspaces\n", pcc_mbox_ctrl.num_chans);
num_chans         150 drivers/mailbox/platform_mhu.c 	mhu->mbox.num_chans = MHU_CHANS;
num_chans          88 drivers/mailbox/qcom-apcs-ipc-mailbox.c 	apcs->mbox.num_chans = ARRAY_SIZE(apcs->mbox_chans);
num_chans          31 drivers/mailbox/rockchip-mailbox.c 	int num_chans;
num_chans          84 drivers/mailbox/rockchip-mailbox.c 	writel_relaxed((1 << mb->mbox.num_chans) - 1,
num_chans         113 drivers/mailbox/rockchip-mailbox.c 	for (idx = 0; idx < mb->mbox.num_chans; idx++) {
num_chans         131 drivers/mailbox/rockchip-mailbox.c 	for (idx = 0; idx < mb->mbox.num_chans; idx++) {
num_chans         155 drivers/mailbox/rockchip-mailbox.c 	.num_chans = 4,
num_chans         182 drivers/mailbox/rockchip-mailbox.c 	mb->chans = devm_kcalloc(&pdev->dev, drv_data->num_chans,
num_chans         187 drivers/mailbox/rockchip-mailbox.c 	mb->mbox.chans = devm_kcalloc(&pdev->dev, drv_data->num_chans,
num_chans         195 drivers/mailbox/rockchip-mailbox.c 	mb->mbox.num_chans = drv_data->num_chans;
num_chans         208 drivers/mailbox/rockchip-mailbox.c 	mb->buf_size = (size_t)resource_size(res) / (drv_data->num_chans * 2);
num_chans         224 drivers/mailbox/rockchip-mailbox.c 	for (i = 0; i < mb->mbox.num_chans; i++) {
num_chans         308 drivers/mailbox/stm32-ipcc.c 	ipcc->controller.num_chans = ipcc->n_chans;
num_chans         309 drivers/mailbox/stm32-ipcc.c 	ipcc->controller.chans = devm_kcalloc(dev, ipcc->controller.num_chans,
num_chans         317 drivers/mailbox/stm32-ipcc.c 	for (i = 0; i < ipcc->controller.num_chans; i++)
num_chans         331 drivers/mailbox/stm32-ipcc.c 		 ipcc->controller.num_chans, ipcc->proc_id);
num_chans         179 drivers/mailbox/tegra-hsp.c 	for_each_set_bit(master, &value, hsp->mbox_db.num_chans) {
num_chans         314 drivers/mailbox/tegra-hsp.c 	if (db->master >= chan->mbox->num_chans) {
num_chans         516 drivers/mailbox/tegra-hsp.c 	for (i = 0; i < mbox->num_chans; i++) {
num_chans         697 drivers/mailbox/tegra-hsp.c 	hsp->mbox_db.num_chans = 32;
num_chans         701 drivers/mailbox/tegra-hsp.c 	hsp->mbox_db.chans = devm_kcalloc(&pdev->dev, hsp->mbox_db.num_chans,
num_chans         725 drivers/mailbox/tegra-hsp.c 	hsp->mbox_sm.num_chans = hsp->num_sm;
num_chans         729 drivers/mailbox/tegra-hsp.c 	hsp->mbox_sm.chans = devm_kcalloc(&pdev->dev, hsp->mbox_sm.num_chans,
num_chans         812 drivers/mailbox/ti-msgmgr.c 	mbox->num_chans = inst->num_valid_queues;
num_chans         588 drivers/mailbox/zynqmp-ipi-mailbox.c 	mbox->num_chans = 2;
num_chans         620 drivers/net/wireless/broadcom/brcm80211/brcmfmac/p2p.c static s32 brcmf_p2p_escan(struct brcmf_p2p_info *p2p, u32 num_chans,
num_chans         636 drivers/net/wireless/broadcom/brcm80211/brcmfmac/p2p.c 	memsize += num_chans * sizeof(__le16);
num_chans         694 drivers/net/wireless/broadcom/brcm80211/brcmfmac/p2p.c 	if (num_chans == SOCIAL_CHAN_CNT || num_chans == (SOCIAL_CHAN_CNT + 1))
num_chans         696 drivers/net/wireless/broadcom/brcm80211/brcmfmac/p2p.c 	else if (num_chans == AF_PEER_SEARCH_CNT)
num_chans         704 drivers/net/wireless/broadcom/brcm80211/brcmfmac/p2p.c 	if (num_chans == 1) {
num_chans         721 drivers/net/wireless/broadcom/brcm80211/brcmfmac/p2p.c 	sparams->channel_num = cpu_to_le32(num_chans &
num_chans         723 drivers/net/wireless/broadcom/brcm80211/brcmfmac/p2p.c 	for (i = 0; i < num_chans; i++)
num_chans        1316 drivers/net/wireless/quantenna/qtnfmac/commands.c 		if (band->n_channels == resp->num_chans) {
num_chans        1326 drivers/net/wireless/quantenna/qtnfmac/commands.c 	band->n_channels = resp->num_chans;
num_chans         911 drivers/net/wireless/quantenna/qtnfmac/qlink.h 	u8 num_chans;
num_chans          78 include/linux/mailbox_controller.h 	int num_chans;
num_chans        2468 sound/pci/hda/patch_ca0132.c 				     unsigned int num_chans,
num_chans        2483 sound/pci/hda/patch_ca0132.c 	val |= num_chans - 1;
num_chans        2529 sound/pci/hda/patch_ca0132.c 			unsigned int num_chans,
num_chans        2541 sound/pci/hda/patch_ca0132.c 	status = dsp_allocate_router_ports(codec, num_chans,
num_chans        2554 sound/pci/hda/patch_ca0132.c 	unsigned int num_chans;
num_chans        2565 sound/pci/hda/patch_ca0132.c 	num_chans = get_hdafmt_chs(fmt) + 1;
num_chans        2567 sound/pci/hda/patch_ca0132.c 	status = dsp_allocate_ports(codec, num_chans, rate_multi, port_map);
num_chans        2802 sound/pci/hda/patch_ca0132.c 	unsigned int num_chans;
num_chans        2858 sound/pci/hda/patch_ca0132.c 	num_chans = get_hdafmt_chs(hda_format) + 1;
num_chans        2861 sound/pci/hda/patch_ca0132.c 			(num_chans * sample_rate_mul / sample_rate_div));
num_chans        2875 sound/pci/hda/patch_ca0132.c 		   chip_addx, hda_frame_size_words, num_chans,