npei_ctl_status2  429 arch/mips/pci/pcie-octeon.c 		union cvmx_npei_ctl_status2 npei_ctl_status2;
npei_ctl_status2  436 arch/mips/pci/pcie-octeon.c 		npei_ctl_status2.u64 = cvmx_read_csr(CVMX_PEXP_NPEI_CTL_STATUS2);
npei_ctl_status2  438 arch/mips/pci/pcie-octeon.c 		npei_ctl_status2.s.mps = MPS_CN5XXX;
npei_ctl_status2  440 arch/mips/pci/pcie-octeon.c 		npei_ctl_status2.s.mrrs = MRRS_CN5XXX;
npei_ctl_status2  442 arch/mips/pci/pcie-octeon.c 			npei_ctl_status2.s.c1_b1_s = 3; /* Port1 BAR1 Size 256MB */
npei_ctl_status2  444 arch/mips/pci/pcie-octeon.c 			npei_ctl_status2.s.c0_b1_s = 3; /* Port0 BAR1 Size 256MB */
npei_ctl_status2  446 arch/mips/pci/pcie-octeon.c 		cvmx_write_csr(CVMX_PEXP_NPEI_CTL_STATUS2, npei_ctl_status2.u64);