npcm7xx_to        134 drivers/clocksource/timer-npcm7xx.c static struct timer_of npcm7xx_to = {
npcm7xx_to        158 drivers/clocksource/timer-npcm7xx.c 		timer_of_base(&npcm7xx_to) + NPCM7XX_REG_TCSR0);
npcm7xx_to        161 drivers/clocksource/timer-npcm7xx.c 		timer_of_base(&npcm7xx_to) + NPCM7XX_REG_TISR);
npcm7xx_to        163 drivers/clocksource/timer-npcm7xx.c 	npcm7xx_to.clkevt.cpumask = cpumask_of(0);
npcm7xx_to        164 drivers/clocksource/timer-npcm7xx.c 	clockevents_config_and_register(&npcm7xx_to.clkevt,
npcm7xx_to        165 drivers/clocksource/timer-npcm7xx.c 					timer_of_rate(&npcm7xx_to),
npcm7xx_to        174 drivers/clocksource/timer-npcm7xx.c 		timer_of_base(&npcm7xx_to) + NPCM7XX_REG_TCSR1);
npcm7xx_to        176 drivers/clocksource/timer-npcm7xx.c 		timer_of_base(&npcm7xx_to) + NPCM7XX_REG_TICR1);
npcm7xx_to        178 drivers/clocksource/timer-npcm7xx.c 	val = readl(timer_of_base(&npcm7xx_to) + NPCM7XX_REG_TCSR1);
npcm7xx_to        180 drivers/clocksource/timer-npcm7xx.c 	writel(val, timer_of_base(&npcm7xx_to) + NPCM7XX_REG_TCSR1);
npcm7xx_to        182 drivers/clocksource/timer-npcm7xx.c 	clocksource_mmio_init(timer_of_base(&npcm7xx_to) +
npcm7xx_to        184 drivers/clocksource/timer-npcm7xx.c 				"npcm7xx-timer1", timer_of_rate(&npcm7xx_to),
npcm7xx_to        193 drivers/clocksource/timer-npcm7xx.c 	ret = timer_of_init(np, &npcm7xx_to);
npcm7xx_to        199 drivers/clocksource/timer-npcm7xx.c 	npcm7xx_to.of_clk.rate = npcm7xx_to.of_clk.rate /
npcm7xx_to        206 drivers/clocksource/timer-npcm7xx.c 		timer_of_base(&npcm7xx_to), timer_of_irq(&npcm7xx_to));