OUT_CLAMP_CONTROL_G_Y  447 drivers/gpu/drm/amd/display/dc/dce/dce_transform.c 	REG_SET_2(OUT_CLAMP_CONTROL_G_Y, 0,
OUT_CLAMP_CONTROL_G_Y   74 drivers/gpu/drm/amd/display/dc/dce/dce_transform.h 	SRI(OUT_CLAMP_CONTROL_G_Y, DCP, id), \
OUT_CLAMP_CONTROL_G_Y  117 drivers/gpu/drm/amd/display/dc/dce/dce_transform.h 	XFM_SF(OUT_CLAMP_CONTROL_G_Y, OUT_CLAMP_MIN_G_Y, mask_sh), \
OUT_CLAMP_CONTROL_G_Y  118 drivers/gpu/drm/amd/display/dc/dce/dce_transform.h 	XFM_SF(OUT_CLAMP_CONTROL_G_Y, OUT_CLAMP_MAX_G_Y, mask_sh), \
OUT_CLAMP_CONTROL_G_Y  422 drivers/gpu/drm/amd/display/dc/dce/dce_transform.h 	uint32_t OUT_CLAMP_CONTROL_G_Y;