nmerge           2887 arch/mips/include/asm/octeon/cvmx-npei-defs.h 		uint64_t nmerge:1;
nmerge           2903 arch/mips/include/asm/octeon/cvmx-npei-defs.h 		uint64_t nmerge:1;
nmerge           1560 arch/mips/include/asm/octeon/cvmx-npi-defs.h 		uint64_t nmerge:1;
nmerge           1576 arch/mips/include/asm/octeon/cvmx-npi-defs.h 		uint64_t nmerge:1;
nmerge            106 arch/mips/include/asm/octeon/cvmx-sli-defs.h 		__BITFIELD_FIELD(uint64_t nmerge:1,
nmerge            118 arch/mips/include/asm/octeon/cvmx-sli-defs.h 		__BITFIELD_FIELD(uint64_t nmerge:1,
nmerge            891 arch/mips/pci/pcie-octeon.c 	mem_access_subid.s.nmerge = 1;	/* Due to an errata on pass 1 chips, no merging is allowed. */
nmerge           1343 arch/mips/pci/pcie-octeon.c 	mem_access_subid.s.nmerge = 0;	/* Allow merging as it works on CN6XXX. */