OTG_V_TOTAL_MIN 211 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.c REG_SET(OTG_V_TOTAL_MIN, 0, OTG_V_TOTAL_MIN 212 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.c OTG_V_TOTAL_MIN, v_total); OTG_V_TOTAL_MIN 868 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.c REG_SET(OTG_V_TOTAL_MIN, 0, OTG_V_TOTAL_MIN 869 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.c OTG_V_TOTAL_MIN, params->vertical_total_min - 1); OTG_V_TOTAL_MIN 888 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.c REG_SET(OTG_V_TOTAL_MIN, 0, OTG_V_TOTAL_MIN 889 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.c OTG_V_TOTAL_MIN, 0); OTG_V_TOTAL_MIN 1310 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.c REG_GET(OTG_V_TOTAL_MIN, OTG_V_TOTAL_MIN 1311 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.c OTG_V_TOTAL_MIN, &s->v_total_min); OTG_V_TOTAL_MIN 58 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.h SRI(OTG_V_TOTAL_MIN, OTG, inst),\ OTG_V_TOTAL_MIN 130 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.h uint32_t OTG_V_TOTAL_MIN; OTG_V_TOTAL_MIN 220 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.h SF(OTG0_OTG_V_TOTAL_MIN, OTG_V_TOTAL_MIN, mask_sh),\ OTG_V_TOTAL_MIN 357 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.h type OTG_V_TOTAL_MIN;\