ni_pi 1982 drivers/gpu/drm/amd/amdgpu/si_dpm.c struct ni_power_info *ni_pi = ni_get_pi(adev); ni_pi 2149 drivers/gpu/drm/amd/amdgpu/si_dpm.c ni_pi->enable_power_containment = false; ni_pi 2150 drivers/gpu/drm/amd/amdgpu/si_dpm.c ni_pi->enable_cac = false; ni_pi 2151 drivers/gpu/drm/amd/amdgpu/si_dpm.c ni_pi->enable_sq_ramping = false; ni_pi 2155 drivers/gpu/drm/amd/amdgpu/si_dpm.c ni_pi->enable_power_containment = true; ni_pi 2156 drivers/gpu/drm/amd/amdgpu/si_dpm.c ni_pi->enable_cac = true; ni_pi 2163 drivers/gpu/drm/amd/amdgpu/si_dpm.c ni_pi->enable_sq_ramping = true; ni_pi 2166 drivers/gpu/drm/amd/amdgpu/si_dpm.c ni_pi->driver_calculate_cac_leakage = true; ni_pi 2167 drivers/gpu/drm/amd/amdgpu/si_dpm.c ni_pi->cac_configuration_required = true; ni_pi 2169 drivers/gpu/drm/amd/amdgpu/si_dpm.c if (ni_pi->cac_configuration_required) { ni_pi 2170 drivers/gpu/drm/amd/amdgpu/si_dpm.c ni_pi->support_cac_long_term_average = true; ni_pi 2176 drivers/gpu/drm/amd/amdgpu/si_dpm.c ni_pi->support_cac_long_term_average = false; ni_pi 2250 drivers/gpu/drm/amd/amdgpu/si_dpm.c struct ni_power_info *ni_pi = ni_get_pi(adev); ni_pi 2253 drivers/gpu/drm/amd/amdgpu/si_dpm.c if (ni_pi->enable_power_containment) { ni_pi 2315 drivers/gpu/drm/amd/amdgpu/si_dpm.c struct ni_power_info *ni_pi = ni_get_pi(adev); ni_pi 2318 drivers/gpu/drm/amd/amdgpu/si_dpm.c if (ni_pi->enable_power_containment) { ni_pi 2390 drivers/gpu/drm/amd/amdgpu/si_dpm.c struct ni_power_info *ni_pi = ni_get_pi(adev); ni_pi 2404 drivers/gpu/drm/amd/amdgpu/si_dpm.c if (ni_pi->enable_power_containment == false) ni_pi 2482 drivers/gpu/drm/amd/amdgpu/si_dpm.c struct ni_power_info *ni_pi = ni_get_pi(adev); ni_pi 2485 drivers/gpu/drm/amd/amdgpu/si_dpm.c bool enable_sq_ramping = ni_pi->enable_sq_ramping; ni_pi 2539 drivers/gpu/drm/amd/amdgpu/si_dpm.c struct ni_power_info *ni_pi = ni_get_pi(adev); ni_pi 2543 drivers/gpu/drm/amd/amdgpu/si_dpm.c if (ni_pi->enable_power_containment) { ni_pi 2549 drivers/gpu/drm/amd/amdgpu/si_dpm.c ni_pi->pc_enabled = false; ni_pi 2551 drivers/gpu/drm/amd/amdgpu/si_dpm.c ni_pi->pc_enabled = true; ni_pi 2558 drivers/gpu/drm/amd/amdgpu/si_dpm.c ni_pi->pc_enabled = false; ni_pi 2753 drivers/gpu/drm/amd/amdgpu/si_dpm.c struct ni_power_info *ni_pi = ni_get_pi(adev); ni_pi 2762 drivers/gpu/drm/amd/amdgpu/si_dpm.c if (ni_pi->enable_cac == false) ni_pi 2790 drivers/gpu/drm/amd/amdgpu/si_dpm.c if (si_pi->enable_dte || ni_pi->driver_calculate_cac_leakage) ni_pi 2828 drivers/gpu/drm/amd/amdgpu/si_dpm.c ni_pi->enable_cac = false; ni_pi 2829 drivers/gpu/drm/amd/amdgpu/si_dpm.c ni_pi->enable_power_containment = false; ni_pi 2878 drivers/gpu/drm/amd/amdgpu/si_dpm.c struct ni_power_info *ni_pi = ni_get_pi(adev); ni_pi 2882 drivers/gpu/drm/amd/amdgpu/si_dpm.c if ((ni_pi->enable_cac == false) || ni_pi 2883 drivers/gpu/drm/amd/amdgpu/si_dpm.c (ni_pi->cac_configuration_required == false)) ni_pi 2903 drivers/gpu/drm/amd/amdgpu/si_dpm.c struct ni_power_info *ni_pi = ni_get_pi(adev); ni_pi 2908 drivers/gpu/drm/amd/amdgpu/si_dpm.c if (ni_pi->enable_cac) { ni_pi 2911 drivers/gpu/drm/amd/amdgpu/si_dpm.c if (ni_pi->support_cac_long_term_average) { ni_pi 2914 drivers/gpu/drm/amd/amdgpu/si_dpm.c ni_pi->support_cac_long_term_average = false; ni_pi 2920 drivers/gpu/drm/amd/amdgpu/si_dpm.c ni_pi->cac_enabled = false; ni_pi 2922 drivers/gpu/drm/amd/amdgpu/si_dpm.c ni_pi->cac_enabled = true; ni_pi 2931 drivers/gpu/drm/amd/amdgpu/si_dpm.c } else if (ni_pi->cac_enabled) { ni_pi 2937 drivers/gpu/drm/amd/amdgpu/si_dpm.c ni_pi->cac_enabled = false; ni_pi 2939 drivers/gpu/drm/amd/amdgpu/si_dpm.c if (ni_pi->support_cac_long_term_average) ni_pi 2948 drivers/gpu/drm/amd/amdgpu/si_dpm.c struct ni_power_info *ni_pi = ni_get_pi(adev); ni_pi 3010 drivers/gpu/drm/amd/amdgpu/si_dpm.c ni_pi->enable_power_containment = false; ni_pi 3151 drivers/gpu/drm/amd/amdgpu/si_dpm.c struct ni_power_info *ni_pi = ni_get_pi(adev); ni_pi 3154 drivers/gpu/drm/amd/amdgpu/si_dpm.c ni_pi->current_ps = *new_ps; ni_pi 3155 drivers/gpu/drm/amd/amdgpu/si_dpm.c eg_pi->current_rps.ps_priv = &ni_pi->current_ps; ni_pi 3164 drivers/gpu/drm/amd/amdgpu/si_dpm.c struct ni_power_info *ni_pi = ni_get_pi(adev); ni_pi 3167 drivers/gpu/drm/amd/amdgpu/si_dpm.c ni_pi->requested_ps = *new_ps; ni_pi 3168 drivers/gpu/drm/amd/amdgpu/si_dpm.c eg_pi->requested_rps.ps_priv = &ni_pi->requested_ps; ni_pi 5656 drivers/gpu/drm/amd/amdgpu/si_dpm.c struct ni_power_info *ni_pi = ni_get_pi(adev); ni_pi 5698 drivers/gpu/drm/amd/amdgpu/si_dpm.c if (ni_pi->enable_power_containment) ni_pi 5722 drivers/gpu/drm/amd/amdgpu/si_dpm.c ni_pi->enable_power_containment = false; ni_pi 5726 drivers/gpu/drm/amd/amdgpu/si_dpm.c ni_pi->enable_sq_ramping = false; ni_pi 7309 drivers/gpu/drm/amd/amdgpu/si_dpm.c struct ni_power_info *ni_pi; ni_pi 7318 drivers/gpu/drm/amd/amdgpu/si_dpm.c ni_pi = &si_pi->ni; ni_pi 7319 drivers/gpu/drm/amd/amdgpu/si_dpm.c eg_pi = &ni_pi->eg; ni_pi 7390 drivers/gpu/drm/amd/amdgpu/si_dpm.c ni_pi->mclk_rtt_mode_threshold = eg_pi->mclk_edc_wr_enable_threshold; ni_pi 1103 drivers/gpu/drm/radeon/ni_dpm.c struct ni_power_info *ni_pi = ni_get_pi(rdev); ni_pi 1145 drivers/gpu/drm/radeon/ni_dpm.c ni_pi->fan_table_start = (u16)tmp; ni_pi 1155 drivers/gpu/drm/radeon/ni_dpm.c ni_pi->arb_table_start = (u16)tmp; ni_pi 1165 drivers/gpu/drm/radeon/ni_dpm.c ni_pi->cac_table_start = (u16)tmp; ni_pi 1175 drivers/gpu/drm/radeon/ni_dpm.c ni_pi->spll_table_start = (u16)tmp; ni_pi 1183 drivers/gpu/drm/radeon/ni_dpm.c struct ni_power_info *ni_pi = ni_get_pi(rdev); ni_pi 1185 drivers/gpu/drm/radeon/ni_dpm.c ni_pi->clock_registers.cg_spll_func_cntl = RREG32(CG_SPLL_FUNC_CNTL); ni_pi 1186 drivers/gpu/drm/radeon/ni_dpm.c ni_pi->clock_registers.cg_spll_func_cntl_2 = RREG32(CG_SPLL_FUNC_CNTL_2); ni_pi 1187 drivers/gpu/drm/radeon/ni_dpm.c ni_pi->clock_registers.cg_spll_func_cntl_3 = RREG32(CG_SPLL_FUNC_CNTL_3); ni_pi 1188 drivers/gpu/drm/radeon/ni_dpm.c ni_pi->clock_registers.cg_spll_func_cntl_4 = RREG32(CG_SPLL_FUNC_CNTL_4); ni_pi 1189 drivers/gpu/drm/radeon/ni_dpm.c ni_pi->clock_registers.cg_spll_spread_spectrum = RREG32(CG_SPLL_SPREAD_SPECTRUM); ni_pi 1190 drivers/gpu/drm/radeon/ni_dpm.c ni_pi->clock_registers.cg_spll_spread_spectrum_2 = RREG32(CG_SPLL_SPREAD_SPECTRUM_2); ni_pi 1191 drivers/gpu/drm/radeon/ni_dpm.c ni_pi->clock_registers.mpll_ad_func_cntl = RREG32(MPLL_AD_FUNC_CNTL); ni_pi 1192 drivers/gpu/drm/radeon/ni_dpm.c ni_pi->clock_registers.mpll_ad_func_cntl_2 = RREG32(MPLL_AD_FUNC_CNTL_2); ni_pi 1193 drivers/gpu/drm/radeon/ni_dpm.c ni_pi->clock_registers.mpll_dq_func_cntl = RREG32(MPLL_DQ_FUNC_CNTL); ni_pi 1194 drivers/gpu/drm/radeon/ni_dpm.c ni_pi->clock_registers.mpll_dq_func_cntl_2 = RREG32(MPLL_DQ_FUNC_CNTL_2); ni_pi 1195 drivers/gpu/drm/radeon/ni_dpm.c ni_pi->clock_registers.mclk_pwrmgt_cntl = RREG32(MCLK_PWRMGT_CNTL); ni_pi 1196 drivers/gpu/drm/radeon/ni_dpm.c ni_pi->clock_registers.dll_cntl = RREG32(DLL_CNTL); ni_pi 1197 drivers/gpu/drm/radeon/ni_dpm.c ni_pi->clock_registers.mpll_ss1 = RREG32(MPLL_SS1); ni_pi 1198 drivers/gpu/drm/radeon/ni_dpm.c ni_pi->clock_registers.mpll_ss2 = RREG32(MPLL_SS2); ni_pi 1388 drivers/gpu/drm/radeon/ni_dpm.c struct ni_power_info *ni_pi = ni_get_pi(rdev); ni_pi 1392 drivers/gpu/drm/radeon/ni_dpm.c if (ni_pi->enable_power_containment && ni_pi 1393 drivers/gpu/drm/radeon/ni_dpm.c ni_pi->use_power_boost_limit) { ni_pi 1458 drivers/gpu/drm/radeon/ni_dpm.c struct ni_power_info *ni_pi = ni_get_pi(rdev); ni_pi 1460 drivers/gpu/drm/radeon/ni_dpm.c if (ni_pi->enable_power_containment) { ni_pi 1461 drivers/gpu/drm/radeon/ni_dpm.c NISLANDS_SMC_STATETABLE *smc_table = &ni_pi->smc_statetable; ni_pi 1574 drivers/gpu/drm/radeon/ni_dpm.c struct ni_power_info *ni_pi = ni_get_pi(rdev); ni_pi 1578 drivers/gpu/drm/radeon/ni_dpm.c ret = rv770_read_smc_sram_dword(rdev, ni_pi->arb_table_start, ni_pi 1586 drivers/gpu/drm/radeon/ni_dpm.c return rv770_write_smc_sram_dword(rdev, ni_pi->arb_table_start, ni_pi 1598 drivers/gpu/drm/radeon/ni_dpm.c struct ni_power_info *ni_pi = ni_get_pi(rdev); ni_pi 1602 drivers/gpu/drm/radeon/ni_dpm.c ret = rv770_read_smc_sram_dword(rdev, ni_pi->arb_table_start, ni_pi 1642 drivers/gpu/drm/radeon/ni_dpm.c struct ni_power_info *ni_pi = ni_get_pi(rdev); ni_pi 1653 drivers/gpu/drm/radeon/ni_dpm.c (u16)(ni_pi->arb_table_start + ni_pi 1688 drivers/gpu/drm/radeon/ni_dpm.c struct ni_power_info *ni_pi = ni_get_pi(rdev); ni_pi 1693 drivers/gpu/drm/radeon/ni_dpm.c cpu_to_be32(ni_pi->clock_registers.mpll_ad_func_cntl); ni_pi 1695 drivers/gpu/drm/radeon/ni_dpm.c cpu_to_be32(ni_pi->clock_registers.mpll_ad_func_cntl_2); ni_pi 1697 drivers/gpu/drm/radeon/ni_dpm.c cpu_to_be32(ni_pi->clock_registers.mpll_dq_func_cntl); ni_pi 1699 drivers/gpu/drm/radeon/ni_dpm.c cpu_to_be32(ni_pi->clock_registers.mpll_dq_func_cntl_2); ni_pi 1701 drivers/gpu/drm/radeon/ni_dpm.c cpu_to_be32(ni_pi->clock_registers.mclk_pwrmgt_cntl); ni_pi 1703 drivers/gpu/drm/radeon/ni_dpm.c cpu_to_be32(ni_pi->clock_registers.dll_cntl); ni_pi 1705 drivers/gpu/drm/radeon/ni_dpm.c cpu_to_be32(ni_pi->clock_registers.mpll_ss1); ni_pi 1707 drivers/gpu/drm/radeon/ni_dpm.c cpu_to_be32(ni_pi->clock_registers.mpll_ss2); ni_pi 1712 drivers/gpu/drm/radeon/ni_dpm.c cpu_to_be32(ni_pi->clock_registers.cg_spll_func_cntl); ni_pi 1714 drivers/gpu/drm/radeon/ni_dpm.c cpu_to_be32(ni_pi->clock_registers.cg_spll_func_cntl_2); ni_pi 1716 drivers/gpu/drm/radeon/ni_dpm.c cpu_to_be32(ni_pi->clock_registers.cg_spll_func_cntl_3); ni_pi 1718 drivers/gpu/drm/radeon/ni_dpm.c cpu_to_be32(ni_pi->clock_registers.cg_spll_func_cntl_4); ni_pi 1720 drivers/gpu/drm/radeon/ni_dpm.c cpu_to_be32(ni_pi->clock_registers.cg_spll_spread_spectrum); ni_pi 1722 drivers/gpu/drm/radeon/ni_dpm.c cpu_to_be32(ni_pi->clock_registers.cg_spll_spread_spectrum_2); ni_pi 1797 drivers/gpu/drm/radeon/ni_dpm.c struct ni_power_info *ni_pi = ni_get_pi(rdev); ni_pi 1798 drivers/gpu/drm/radeon/ni_dpm.c u32 mpll_ad_func_cntl = ni_pi->clock_registers.mpll_ad_func_cntl; ni_pi 1799 drivers/gpu/drm/radeon/ni_dpm.c u32 mpll_ad_func_cntl_2 = ni_pi->clock_registers.mpll_ad_func_cntl_2; ni_pi 1800 drivers/gpu/drm/radeon/ni_dpm.c u32 mpll_dq_func_cntl = ni_pi->clock_registers.mpll_dq_func_cntl; ni_pi 1801 drivers/gpu/drm/radeon/ni_dpm.c u32 mpll_dq_func_cntl_2 = ni_pi->clock_registers.mpll_dq_func_cntl_2; ni_pi 1802 drivers/gpu/drm/radeon/ni_dpm.c u32 spll_func_cntl = ni_pi->clock_registers.cg_spll_func_cntl; ni_pi 1803 drivers/gpu/drm/radeon/ni_dpm.c u32 spll_func_cntl_2 = ni_pi->clock_registers.cg_spll_func_cntl_2; ni_pi 1804 drivers/gpu/drm/radeon/ni_dpm.c u32 spll_func_cntl_3 = ni_pi->clock_registers.cg_spll_func_cntl_3; ni_pi 1805 drivers/gpu/drm/radeon/ni_dpm.c u32 spll_func_cntl_4 = ni_pi->clock_registers.cg_spll_func_cntl_4; ni_pi 1806 drivers/gpu/drm/radeon/ni_dpm.c u32 mclk_pwrmgt_cntl = ni_pi->clock_registers.mclk_pwrmgt_cntl; ni_pi 1807 drivers/gpu/drm/radeon/ni_dpm.c u32 dll_cntl = ni_pi->clock_registers.dll_cntl; ni_pi 1943 drivers/gpu/drm/radeon/ni_dpm.c struct ni_power_info *ni_pi = ni_get_pi(rdev); ni_pi 1946 drivers/gpu/drm/radeon/ni_dpm.c NISLANDS_SMC_STATETABLE *table = &ni_pi->smc_statetable; ni_pi 2003 drivers/gpu/drm/radeon/ni_dpm.c struct ni_power_info *ni_pi = ni_get_pi(rdev); ni_pi 2005 drivers/gpu/drm/radeon/ni_dpm.c u32 spll_func_cntl = ni_pi->clock_registers.cg_spll_func_cntl; ni_pi 2006 drivers/gpu/drm/radeon/ni_dpm.c u32 spll_func_cntl_2 = ni_pi->clock_registers.cg_spll_func_cntl_2; ni_pi 2007 drivers/gpu/drm/radeon/ni_dpm.c u32 spll_func_cntl_3 = ni_pi->clock_registers.cg_spll_func_cntl_3; ni_pi 2008 drivers/gpu/drm/radeon/ni_dpm.c u32 spll_func_cntl_4 = ni_pi->clock_registers.cg_spll_func_cntl_4; ni_pi 2009 drivers/gpu/drm/radeon/ni_dpm.c u32 cg_spll_spread_spectrum = ni_pi->clock_registers.cg_spll_spread_spectrum; ni_pi 2010 drivers/gpu/drm/radeon/ni_dpm.c u32 cg_spll_spread_spectrum_2 = ni_pi->clock_registers.cg_spll_spread_spectrum_2; ni_pi 2093 drivers/gpu/drm/radeon/ni_dpm.c struct ni_power_info *ni_pi = ni_get_pi(rdev); ni_pi 2104 drivers/gpu/drm/radeon/ni_dpm.c if (ni_pi->spll_table_start == 0) ni_pi 2152 drivers/gpu/drm/radeon/ni_dpm.c ret = rv770_copy_bytes_to_smc(rdev, ni_pi->spll_table_start, (u8 *)spll_table, ni_pi 2168 drivers/gpu/drm/radeon/ni_dpm.c struct ni_power_info *ni_pi = ni_get_pi(rdev); ni_pi 2169 drivers/gpu/drm/radeon/ni_dpm.c u32 mpll_ad_func_cntl = ni_pi->clock_registers.mpll_ad_func_cntl; ni_pi 2170 drivers/gpu/drm/radeon/ni_dpm.c u32 mpll_ad_func_cntl_2 = ni_pi->clock_registers.mpll_ad_func_cntl_2; ni_pi 2171 drivers/gpu/drm/radeon/ni_dpm.c u32 mpll_dq_func_cntl = ni_pi->clock_registers.mpll_dq_func_cntl; ni_pi 2172 drivers/gpu/drm/radeon/ni_dpm.c u32 mpll_dq_func_cntl_2 = ni_pi->clock_registers.mpll_dq_func_cntl_2; ni_pi 2173 drivers/gpu/drm/radeon/ni_dpm.c u32 mclk_pwrmgt_cntl = ni_pi->clock_registers.mclk_pwrmgt_cntl; ni_pi 2174 drivers/gpu/drm/radeon/ni_dpm.c u32 dll_cntl = ni_pi->clock_registers.dll_cntl; ni_pi 2175 drivers/gpu/drm/radeon/ni_dpm.c u32 mpll_ss1 = ni_pi->clock_registers.mpll_ss1; ni_pi 2176 drivers/gpu/drm/radeon/ni_dpm.c u32 mpll_ss2 = ni_pi->clock_registers.mpll_ss2; ni_pi 2315 drivers/gpu/drm/radeon/ni_dpm.c struct ni_power_info *ni_pi = ni_get_pi(rdev); ni_pi 2352 drivers/gpu/drm/radeon/ni_dpm.c if (pl->mclk > ni_pi->mclk_rtt_mode_threshold) ni_pi 2456 drivers/gpu/drm/radeon/ni_dpm.c struct ni_power_info *ni_pi = ni_get_pi(rdev); ni_pi 2467 drivers/gpu/drm/radeon/ni_dpm.c if (ni_pi->enable_power_containment == false) ni_pi 2540 drivers/gpu/drm/radeon/ni_dpm.c struct ni_power_info *ni_pi = ni_get_pi(rdev); ni_pi 2544 drivers/gpu/drm/radeon/ni_dpm.c bool enable_sq_ramping = ni_pi->enable_sq_ramping; ni_pi 2598 drivers/gpu/drm/radeon/ni_dpm.c struct ni_power_info *ni_pi = ni_get_pi(rdev); ni_pi 2602 drivers/gpu/drm/radeon/ni_dpm.c if (ni_pi->enable_power_containment) { ni_pi 2608 drivers/gpu/drm/radeon/ni_dpm.c ni_pi->pc_enabled = false; ni_pi 2610 drivers/gpu/drm/radeon/ni_dpm.c ni_pi->pc_enabled = true; ni_pi 2617 drivers/gpu/drm/radeon/ni_dpm.c ni_pi->pc_enabled = false; ni_pi 2629 drivers/gpu/drm/radeon/ni_dpm.c struct ni_power_info *ni_pi = ni_get_pi(rdev); ni_pi 2651 drivers/gpu/drm/radeon/ni_dpm.c if (ni_pi->enable_power_containment) ni_pi 2674 drivers/gpu/drm/radeon/ni_dpm.c ni_pi->enable_power_containment = false; ni_pi 2678 drivers/gpu/drm/radeon/ni_dpm.c ni_pi->enable_sq_ramping = false; ni_pi 2873 drivers/gpu/drm/radeon/ni_dpm.c struct ni_power_info *ni_pi = ni_get_pi(rdev); ni_pi 2876 drivers/gpu/drm/radeon/ni_dpm.c struct ni_mc_reg_table *ni_table = &ni_pi->mc_reg_table; ni_pi 2925 drivers/gpu/drm/radeon/ni_dpm.c struct ni_power_info *ni_pi = ni_get_pi(rdev); ni_pi 2928 drivers/gpu/drm/radeon/ni_dpm.c for (i = 0, j = 0; j < ni_pi->mc_reg_table.last; j++) { ni_pi 2929 drivers/gpu/drm/radeon/ni_dpm.c if (ni_pi->mc_reg_table.valid_flag & (1 << j)) { ni_pi 2933 drivers/gpu/drm/radeon/ni_dpm.c cpu_to_be16(ni_pi->mc_reg_table.mc_reg_address[j].s0); ni_pi 2935 drivers/gpu/drm/radeon/ni_dpm.c cpu_to_be16(ni_pi->mc_reg_table.mc_reg_address[j].s1); ni_pi 2961 drivers/gpu/drm/radeon/ni_dpm.c struct ni_power_info *ni_pi = ni_get_pi(rdev); ni_pi 2964 drivers/gpu/drm/radeon/ni_dpm.c for (i = 0; i < ni_pi->mc_reg_table.num_entries; i++) { ni_pi 2965 drivers/gpu/drm/radeon/ni_dpm.c if (pl->mclk <= ni_pi->mc_reg_table.mc_reg_table_entry[i].mclk_max) ni_pi 2969 drivers/gpu/drm/radeon/ni_dpm.c if ((i == ni_pi->mc_reg_table.num_entries) && (i > 0)) ni_pi 2972 drivers/gpu/drm/radeon/ni_dpm.c ni_convert_mc_registers(&ni_pi->mc_reg_table.mc_reg_table_entry[i], ni_pi 2974 drivers/gpu/drm/radeon/ni_dpm.c ni_pi->mc_reg_table.last, ni_pi 2975 drivers/gpu/drm/radeon/ni_dpm.c ni_pi->mc_reg_table.valid_flag); ni_pi 2997 drivers/gpu/drm/radeon/ni_dpm.c struct ni_power_info *ni_pi = ni_get_pi(rdev); ni_pi 2999 drivers/gpu/drm/radeon/ni_dpm.c SMC_NIslands_MCRegisters *mc_reg_table = &ni_pi->smc_mc_reg_table; ni_pi 3010 drivers/gpu/drm/radeon/ni_dpm.c ni_convert_mc_registers(&ni_pi->mc_reg_table.mc_reg_table_entry[0], ni_pi 3012 drivers/gpu/drm/radeon/ni_dpm.c ni_pi->mc_reg_table.last, ni_pi 3013 drivers/gpu/drm/radeon/ni_dpm.c ni_pi->mc_reg_table.valid_flag); ni_pi 3028 drivers/gpu/drm/radeon/ni_dpm.c struct ni_power_info *ni_pi = ni_get_pi(rdev); ni_pi 3030 drivers/gpu/drm/radeon/ni_dpm.c SMC_NIslands_MCRegisters *mc_reg_table = &ni_pi->smc_mc_reg_table; ni_pi 3049 drivers/gpu/drm/radeon/ni_dpm.c struct ni_power_info *ni_pi = ni_get_pi(rdev); ni_pi 3068 drivers/gpu/drm/radeon/ni_dpm.c if (t < ni_pi->cac_data.leakage_minimum_temperature) ni_pi 3069 drivers/gpu/drm/radeon/ni_dpm.c t = ni_pi->cac_data.leakage_minimum_temperature; ni_pi 3072 drivers/gpu/drm/radeon/ni_dpm.c &ni_pi->cac_data.leakage_coefficients, ni_pi 3075 drivers/gpu/drm/radeon/ni_dpm.c ni_pi->cac_data.i_leakage, ni_pi 3142 drivers/gpu/drm/radeon/ni_dpm.c struct ni_power_info *ni_pi = ni_get_pi(rdev); ni_pi 3147 drivers/gpu/drm/radeon/ni_dpm.c if (ni_pi->enable_cac == false) ni_pi 3155 drivers/gpu/drm/radeon/ni_dpm.c reg |= (TID_CNT(ni_pi->cac_weights->tid_cnt) | ni_pi 3156 drivers/gpu/drm/radeon/ni_dpm.c TID_UNIT(ni_pi->cac_weights->tid_unit)); ni_pi 3160 drivers/gpu/drm/radeon/ni_dpm.c ni_pi->dc_cac_table[i] = ni_pi->cac_weights->dc_cac[i]; ni_pi 3163 drivers/gpu/drm/radeon/ni_dpm.c cac_tables->cac_bif_lut[i] = ni_pi->cac_weights->pcie_cac[i]; ni_pi 3165 drivers/gpu/drm/radeon/ni_dpm.c ni_pi->cac_data.i_leakage = rdev->pm.dpm.cac_leakage; ni_pi 3166 drivers/gpu/drm/radeon/ni_dpm.c ni_pi->cac_data.pwr_const = 0; ni_pi 3167 drivers/gpu/drm/radeon/ni_dpm.c ni_pi->cac_data.dc_cac_value = ni_pi->dc_cac_table[NISLANDS_DCCAC_LEVEL_0]; ni_pi 3168 drivers/gpu/drm/radeon/ni_dpm.c ni_pi->cac_data.bif_cac_value = 0; ni_pi 3169 drivers/gpu/drm/radeon/ni_dpm.c ni_pi->cac_data.mc_wr_weight = ni_pi->cac_weights->mc_write_weight; ni_pi 3170 drivers/gpu/drm/radeon/ni_dpm.c ni_pi->cac_data.mc_rd_weight = ni_pi->cac_weights->mc_read_weight; ni_pi 3171 drivers/gpu/drm/radeon/ni_dpm.c ni_pi->cac_data.allow_ovrflw = 0; ni_pi 3172 drivers/gpu/drm/radeon/ni_dpm.c ni_pi->cac_data.l2num_win_tdp = ni_pi->lta_window_size; ni_pi 3173 drivers/gpu/drm/radeon/ni_dpm.c ni_pi->cac_data.num_win_tdp = 0; ni_pi 3174 drivers/gpu/drm/radeon/ni_dpm.c ni_pi->cac_data.lts_truncate_n = ni_pi->lts_truncate; ni_pi 3176 drivers/gpu/drm/radeon/ni_dpm.c if (ni_pi->driver_calculate_cac_leakage) ni_pi 3184 drivers/gpu/drm/radeon/ni_dpm.c cac_tables->pwr_const = cpu_to_be32(ni_pi->cac_data.pwr_const); ni_pi 3185 drivers/gpu/drm/radeon/ni_dpm.c cac_tables->dc_cacValue = cpu_to_be32(ni_pi->cac_data.dc_cac_value); ni_pi 3186 drivers/gpu/drm/radeon/ni_dpm.c cac_tables->bif_cacValue = cpu_to_be32(ni_pi->cac_data.bif_cac_value); ni_pi 3187 drivers/gpu/drm/radeon/ni_dpm.c cac_tables->AllowOvrflw = ni_pi->cac_data.allow_ovrflw; ni_pi 3188 drivers/gpu/drm/radeon/ni_dpm.c cac_tables->MCWrWeight = ni_pi->cac_data.mc_wr_weight; ni_pi 3189 drivers/gpu/drm/radeon/ni_dpm.c cac_tables->MCRdWeight = ni_pi->cac_data.mc_rd_weight; ni_pi 3190 drivers/gpu/drm/radeon/ni_dpm.c cac_tables->numWin_TDP = ni_pi->cac_data.num_win_tdp; ni_pi 3191 drivers/gpu/drm/radeon/ni_dpm.c cac_tables->l2numWin_TDP = ni_pi->cac_data.l2num_win_tdp; ni_pi 3192 drivers/gpu/drm/radeon/ni_dpm.c cac_tables->lts_truncate_n = ni_pi->cac_data.lts_truncate_n; ni_pi 3194 drivers/gpu/drm/radeon/ni_dpm.c ret = rv770_copy_bytes_to_smc(rdev, ni_pi->cac_table_start, (u8 *)cac_tables, ni_pi 3199 drivers/gpu/drm/radeon/ni_dpm.c ni_pi->enable_cac = false; ni_pi 3200 drivers/gpu/drm/radeon/ni_dpm.c ni_pi->enable_power_containment = false; ni_pi 3210 drivers/gpu/drm/radeon/ni_dpm.c struct ni_power_info *ni_pi = ni_get_pi(rdev); ni_pi 3213 drivers/gpu/drm/radeon/ni_dpm.c if (!ni_pi->enable_cac || ni_pi 3214 drivers/gpu/drm/radeon/ni_dpm.c !ni_pi->cac_configuration_required) ni_pi 3217 drivers/gpu/drm/radeon/ni_dpm.c if (ni_pi->cac_weights == NULL) ni_pi 3223 drivers/gpu/drm/radeon/ni_dpm.c reg |= (WEIGHT_TCP_SIG0(ni_pi->cac_weights->weight_tcp_sig0) | ni_pi 3224 drivers/gpu/drm/radeon/ni_dpm.c WEIGHT_TCP_SIG1(ni_pi->cac_weights->weight_tcp_sig1) | ni_pi 3225 drivers/gpu/drm/radeon/ni_dpm.c WEIGHT_TA_SIG(ni_pi->cac_weights->weight_ta_sig)); ni_pi 3231 drivers/gpu/drm/radeon/ni_dpm.c reg |= (WEIGHT_TCC_EN0(ni_pi->cac_weights->weight_tcc_en0) | ni_pi 3232 drivers/gpu/drm/radeon/ni_dpm.c WEIGHT_TCC_EN1(ni_pi->cac_weights->weight_tcc_en1) | ni_pi 3233 drivers/gpu/drm/radeon/ni_dpm.c WEIGHT_TCC_EN2(ni_pi->cac_weights->weight_tcc_en2)); ni_pi 3240 drivers/gpu/drm/radeon/ni_dpm.c reg |= (WEIGHT_CB_EN0(ni_pi->cac_weights->weight_cb_en0) | ni_pi 3241 drivers/gpu/drm/radeon/ni_dpm.c WEIGHT_CB_EN1(ni_pi->cac_weights->weight_cb_en1) | ni_pi 3242 drivers/gpu/drm/radeon/ni_dpm.c WEIGHT_CB_EN2(ni_pi->cac_weights->weight_cb_en2) | ni_pi 3243 drivers/gpu/drm/radeon/ni_dpm.c WEIGHT_CB_EN3(ni_pi->cac_weights->weight_cb_en3)); ni_pi 3250 drivers/gpu/drm/radeon/ni_dpm.c reg |= (WEIGHT_DB_SIG0(ni_pi->cac_weights->weight_db_sig0) | ni_pi 3251 drivers/gpu/drm/radeon/ni_dpm.c WEIGHT_DB_SIG1(ni_pi->cac_weights->weight_db_sig1) | ni_pi 3252 drivers/gpu/drm/radeon/ni_dpm.c WEIGHT_DB_SIG2(ni_pi->cac_weights->weight_db_sig2) | ni_pi 3253 drivers/gpu/drm/radeon/ni_dpm.c WEIGHT_DB_SIG3(ni_pi->cac_weights->weight_db_sig3)); ni_pi 3261 drivers/gpu/drm/radeon/ni_dpm.c reg |= (WEIGHT_SXM_SIG0(ni_pi->cac_weights->weight_sxm_sig0) | ni_pi 3262 drivers/gpu/drm/radeon/ni_dpm.c WEIGHT_SXM_SIG1(ni_pi->cac_weights->weight_sxm_sig1) | ni_pi 3263 drivers/gpu/drm/radeon/ni_dpm.c WEIGHT_SXM_SIG2(ni_pi->cac_weights->weight_sxm_sig2) | ni_pi 3264 drivers/gpu/drm/radeon/ni_dpm.c WEIGHT_SXS_SIG0(ni_pi->cac_weights->weight_sxs_sig0) | ni_pi 3265 drivers/gpu/drm/radeon/ni_dpm.c WEIGHT_SXS_SIG1(ni_pi->cac_weights->weight_sxs_sig1)); ni_pi 3272 drivers/gpu/drm/radeon/ni_dpm.c reg |= (WEIGHT_XBR_0(ni_pi->cac_weights->weight_xbr_0) | ni_pi 3273 drivers/gpu/drm/radeon/ni_dpm.c WEIGHT_XBR_1(ni_pi->cac_weights->weight_xbr_1) | ni_pi 3274 drivers/gpu/drm/radeon/ni_dpm.c WEIGHT_XBR_2(ni_pi->cac_weights->weight_xbr_2) | ni_pi 3275 drivers/gpu/drm/radeon/ni_dpm.c WEIGHT_SPI_SIG0(ni_pi->cac_weights->weight_spi_sig0)); ni_pi 3283 drivers/gpu/drm/radeon/ni_dpm.c reg |= (WEIGHT_SPI_SIG1(ni_pi->cac_weights->weight_spi_sig1) | ni_pi 3284 drivers/gpu/drm/radeon/ni_dpm.c WEIGHT_SPI_SIG2(ni_pi->cac_weights->weight_spi_sig2) | ni_pi 3285 drivers/gpu/drm/radeon/ni_dpm.c WEIGHT_SPI_SIG3(ni_pi->cac_weights->weight_spi_sig3) | ni_pi 3286 drivers/gpu/drm/radeon/ni_dpm.c WEIGHT_SPI_SIG4(ni_pi->cac_weights->weight_spi_sig4) | ni_pi 3287 drivers/gpu/drm/radeon/ni_dpm.c WEIGHT_SPI_SIG5(ni_pi->cac_weights->weight_spi_sig5)); ni_pi 3293 drivers/gpu/drm/radeon/ni_dpm.c reg |= (WEIGHT_LDS_SIG0(ni_pi->cac_weights->weight_lds_sig0) | ni_pi 3294 drivers/gpu/drm/radeon/ni_dpm.c WEIGHT_LDS_SIG1(ni_pi->cac_weights->weight_lds_sig1) | ni_pi 3295 drivers/gpu/drm/radeon/ni_dpm.c WEIGHT_SC(ni_pi->cac_weights->weight_sc)); ni_pi 3303 drivers/gpu/drm/radeon/ni_dpm.c reg |= (WEIGHT_BIF(ni_pi->cac_weights->weight_bif) | ni_pi 3304 drivers/gpu/drm/radeon/ni_dpm.c WEIGHT_CP(ni_pi->cac_weights->weight_cp) | ni_pi 3305 drivers/gpu/drm/radeon/ni_dpm.c WEIGHT_PA_SIG0(ni_pi->cac_weights->weight_pa_sig0) | ni_pi 3306 drivers/gpu/drm/radeon/ni_dpm.c WEIGHT_PA_SIG1(ni_pi->cac_weights->weight_pa_sig1) | ni_pi 3307 drivers/gpu/drm/radeon/ni_dpm.c WEIGHT_VGT_SIG0(ni_pi->cac_weights->weight_vgt_sig0)); ni_pi 3315 drivers/gpu/drm/radeon/ni_dpm.c reg |= (WEIGHT_VGT_SIG1(ni_pi->cac_weights->weight_vgt_sig1) | ni_pi 3316 drivers/gpu/drm/radeon/ni_dpm.c WEIGHT_VGT_SIG2(ni_pi->cac_weights->weight_vgt_sig2) | ni_pi 3317 drivers/gpu/drm/radeon/ni_dpm.c WEIGHT_DC_SIG0(ni_pi->cac_weights->weight_dc_sig0) | ni_pi 3318 drivers/gpu/drm/radeon/ni_dpm.c WEIGHT_DC_SIG1(ni_pi->cac_weights->weight_dc_sig1) | ni_pi 3319 drivers/gpu/drm/radeon/ni_dpm.c WEIGHT_DC_SIG2(ni_pi->cac_weights->weight_dc_sig2)); ni_pi 3327 drivers/gpu/drm/radeon/ni_dpm.c reg |= (WEIGHT_DC_SIG3(ni_pi->cac_weights->weight_dc_sig3) | ni_pi 3328 drivers/gpu/drm/radeon/ni_dpm.c WEIGHT_UVD_SIG0(ni_pi->cac_weights->weight_uvd_sig0) | ni_pi 3329 drivers/gpu/drm/radeon/ni_dpm.c WEIGHT_UVD_SIG1(ni_pi->cac_weights->weight_uvd_sig1) | ni_pi 3330 drivers/gpu/drm/radeon/ni_dpm.c WEIGHT_SPARE0(ni_pi->cac_weights->weight_spare0) | ni_pi 3331 drivers/gpu/drm/radeon/ni_dpm.c WEIGHT_SPARE1(ni_pi->cac_weights->weight_spare1)); ni_pi 3336 drivers/gpu/drm/radeon/ni_dpm.c reg |= (WEIGHT_SQ_VSP(ni_pi->cac_weights->weight_sq_vsp) | ni_pi 3337 drivers/gpu/drm/radeon/ni_dpm.c WEIGHT_SQ_VSP0(ni_pi->cac_weights->weight_sq_vsp0)); ni_pi 3341 drivers/gpu/drm/radeon/ni_dpm.c reg |= WEIGHT_SQ_GPR(ni_pi->cac_weights->weight_sq_gpr); ni_pi 3348 drivers/gpu/drm/radeon/ni_dpm.c reg |= (OVR_MODE_SPARE_0(ni_pi->cac_weights->ovr_mode_spare_0) | ni_pi 3349 drivers/gpu/drm/radeon/ni_dpm.c OVR_VAL_SPARE_0(ni_pi->cac_weights->ovr_val_spare_0) | ni_pi 3350 drivers/gpu/drm/radeon/ni_dpm.c OVR_MODE_SPARE_1(ni_pi->cac_weights->ovr_mode_spare_1) | ni_pi 3351 drivers/gpu/drm/radeon/ni_dpm.c OVR_VAL_SPARE_1(ni_pi->cac_weights->ovr_val_spare_1)); ni_pi 3357 drivers/gpu/drm/radeon/ni_dpm.c reg |= (VSP(ni_pi->cac_weights->vsp) | ni_pi 3358 drivers/gpu/drm/radeon/ni_dpm.c VSP0(ni_pi->cac_weights->vsp0) | ni_pi 3359 drivers/gpu/drm/radeon/ni_dpm.c GPR(ni_pi->cac_weights->gpr)); ni_pi 3369 drivers/gpu/drm/radeon/ni_dpm.c reg = (READ_WEIGHT(ni_pi->cac_weights->mc_read_weight) | ni_pi 3370 drivers/gpu/drm/radeon/ni_dpm.c WRITE_WEIGHT(ni_pi->cac_weights->mc_write_weight) | ni_pi 3381 drivers/gpu/drm/radeon/ni_dpm.c struct ni_power_info *ni_pi = ni_get_pi(rdev); ni_pi 3385 drivers/gpu/drm/radeon/ni_dpm.c if (ni_pi->enable_cac) { ni_pi 3390 drivers/gpu/drm/radeon/ni_dpm.c if (ni_pi->support_cac_long_term_average) { ni_pi 3393 drivers/gpu/drm/radeon/ni_dpm.c ni_pi->support_cac_long_term_average = false; ni_pi 3400 drivers/gpu/drm/radeon/ni_dpm.c ni_pi->cac_enabled = (PPSMC_Result_OK == smc_result) ? true : false; ni_pi 3402 drivers/gpu/drm/radeon/ni_dpm.c } else if (ni_pi->cac_enabled) { ni_pi 3405 drivers/gpu/drm/radeon/ni_dpm.c ni_pi->cac_enabled = false; ni_pi 3407 drivers/gpu/drm/radeon/ni_dpm.c if (ni_pi->support_cac_long_term_average) { ni_pi 3410 drivers/gpu/drm/radeon/ni_dpm.c ni_pi->support_cac_long_term_average = false; ni_pi 3566 drivers/gpu/drm/radeon/ni_dpm.c struct ni_power_info *ni_pi = ni_get_pi(rdev); ni_pi 3569 drivers/gpu/drm/radeon/ni_dpm.c ni_pi->current_ps = *new_ps; ni_pi 3570 drivers/gpu/drm/radeon/ni_dpm.c eg_pi->current_rps.ps_priv = &ni_pi->current_ps; ni_pi 3578 drivers/gpu/drm/radeon/ni_dpm.c struct ni_power_info *ni_pi = ni_get_pi(rdev); ni_pi 3581 drivers/gpu/drm/radeon/ni_dpm.c ni_pi->requested_ps = *new_ps; ni_pi 3582 drivers/gpu/drm/radeon/ni_dpm.c eg_pi->requested_rps.ps_priv = &ni_pi->requested_ps; ni_pi 4050 drivers/gpu/drm/radeon/ni_dpm.c struct ni_power_info *ni_pi; ni_pi 4054 drivers/gpu/drm/radeon/ni_dpm.c ni_pi = kzalloc(sizeof(struct ni_power_info), GFP_KERNEL); ni_pi 4055 drivers/gpu/drm/radeon/ni_dpm.c if (ni_pi == NULL) ni_pi 4057 drivers/gpu/drm/radeon/ni_dpm.c rdev->pm.dpm.priv = ni_pi; ni_pi 4058 drivers/gpu/drm/radeon/ni_dpm.c eg_pi = &ni_pi->eg; ni_pi 4138 drivers/gpu/drm/radeon/ni_dpm.c ni_pi->mclk_rtt_mode_threshold = eg_pi->mclk_edc_wr_enable_threshold; ni_pi 4206 drivers/gpu/drm/radeon/ni_dpm.c ni_pi->cac_data.leakage_coefficients.at = 516; ni_pi 4207 drivers/gpu/drm/radeon/ni_dpm.c ni_pi->cac_data.leakage_coefficients.bt = 18; ni_pi 4208 drivers/gpu/drm/radeon/ni_dpm.c ni_pi->cac_data.leakage_coefficients.av = 51; ni_pi 4209 drivers/gpu/drm/radeon/ni_dpm.c ni_pi->cac_data.leakage_coefficients.bv = 2957; ni_pi 4217 drivers/gpu/drm/radeon/ni_dpm.c ni_pi->cac_weights = &cac_weights_cayman_xt; ni_pi 4224 drivers/gpu/drm/radeon/ni_dpm.c ni_pi->cac_weights = &cac_weights_cayman_pro; ni_pi 4231 drivers/gpu/drm/radeon/ni_dpm.c ni_pi->cac_weights = &cac_weights_cayman_le; ni_pi 4235 drivers/gpu/drm/radeon/ni_dpm.c if (ni_pi->cac_weights->enable_power_containment_by_default) { ni_pi 4236 drivers/gpu/drm/radeon/ni_dpm.c ni_pi->enable_power_containment = true; ni_pi 4237 drivers/gpu/drm/radeon/ni_dpm.c ni_pi->enable_cac = true; ni_pi 4238 drivers/gpu/drm/radeon/ni_dpm.c ni_pi->enable_sq_ramping = true; ni_pi 4240 drivers/gpu/drm/radeon/ni_dpm.c ni_pi->enable_power_containment = false; ni_pi 4241 drivers/gpu/drm/radeon/ni_dpm.c ni_pi->enable_cac = false; ni_pi 4242 drivers/gpu/drm/radeon/ni_dpm.c ni_pi->enable_sq_ramping = false; ni_pi 4245 drivers/gpu/drm/radeon/ni_dpm.c ni_pi->driver_calculate_cac_leakage = false; ni_pi 4246 drivers/gpu/drm/radeon/ni_dpm.c ni_pi->cac_configuration_required = true; ni_pi 4248 drivers/gpu/drm/radeon/ni_dpm.c if (ni_pi->cac_configuration_required) { ni_pi 4249 drivers/gpu/drm/radeon/ni_dpm.c ni_pi->support_cac_long_term_average = true; ni_pi 4250 drivers/gpu/drm/radeon/ni_dpm.c ni_pi->lta_window_size = ni_pi->cac_weights->l2_lta_window_size; ni_pi 4251 drivers/gpu/drm/radeon/ni_dpm.c ni_pi->lts_truncate = ni_pi->cac_weights->lts_truncate; ni_pi 4253 drivers/gpu/drm/radeon/ni_dpm.c ni_pi->support_cac_long_term_average = false; ni_pi 4254 drivers/gpu/drm/radeon/ni_dpm.c ni_pi->lta_window_size = 0; ni_pi 4255 drivers/gpu/drm/radeon/ni_dpm.c ni_pi->lts_truncate = 0; ni_pi 4258 drivers/gpu/drm/radeon/ni_dpm.c ni_pi->use_power_boost_limit = true; ni_pi 1870 drivers/gpu/drm/radeon/si_dpm.c struct ni_power_info *ni_pi = ni_get_pi(rdev); ni_pi 2059 drivers/gpu/drm/radeon/si_dpm.c ni_pi->enable_power_containment = false; ni_pi 2060 drivers/gpu/drm/radeon/si_dpm.c ni_pi->enable_cac = false; ni_pi 2061 drivers/gpu/drm/radeon/si_dpm.c ni_pi->enable_sq_ramping = false; ni_pi 2065 drivers/gpu/drm/radeon/si_dpm.c ni_pi->enable_power_containment= true; ni_pi 2066 drivers/gpu/drm/radeon/si_dpm.c ni_pi->enable_cac = true; ni_pi 2073 drivers/gpu/drm/radeon/si_dpm.c ni_pi->enable_sq_ramping = true; ni_pi 2076 drivers/gpu/drm/radeon/si_dpm.c ni_pi->driver_calculate_cac_leakage = true; ni_pi 2077 drivers/gpu/drm/radeon/si_dpm.c ni_pi->cac_configuration_required = true; ni_pi 2079 drivers/gpu/drm/radeon/si_dpm.c if (ni_pi->cac_configuration_required) { ni_pi 2080 drivers/gpu/drm/radeon/si_dpm.c ni_pi->support_cac_long_term_average = true; ni_pi 2086 drivers/gpu/drm/radeon/si_dpm.c ni_pi->support_cac_long_term_average = false; ni_pi 2160 drivers/gpu/drm/radeon/si_dpm.c struct ni_power_info *ni_pi = ni_get_pi(rdev); ni_pi 2163 drivers/gpu/drm/radeon/si_dpm.c if (ni_pi->enable_power_containment) { ni_pi 2225 drivers/gpu/drm/radeon/si_dpm.c struct ni_power_info *ni_pi = ni_get_pi(rdev); ni_pi 2228 drivers/gpu/drm/radeon/si_dpm.c if (ni_pi->enable_power_containment) { ni_pi 2293 drivers/gpu/drm/radeon/si_dpm.c struct ni_power_info *ni_pi = ni_get_pi(rdev); ni_pi 2307 drivers/gpu/drm/radeon/si_dpm.c if (ni_pi->enable_power_containment == false) ni_pi 2386 drivers/gpu/drm/radeon/si_dpm.c struct ni_power_info *ni_pi = ni_get_pi(rdev); ni_pi 2389 drivers/gpu/drm/radeon/si_dpm.c bool enable_sq_ramping = ni_pi->enable_sq_ramping; ni_pi 2443 drivers/gpu/drm/radeon/si_dpm.c struct ni_power_info *ni_pi = ni_get_pi(rdev); ni_pi 2447 drivers/gpu/drm/radeon/si_dpm.c if (ni_pi->enable_power_containment) { ni_pi 2453 drivers/gpu/drm/radeon/si_dpm.c ni_pi->pc_enabled = false; ni_pi 2455 drivers/gpu/drm/radeon/si_dpm.c ni_pi->pc_enabled = true; ni_pi 2462 drivers/gpu/drm/radeon/si_dpm.c ni_pi->pc_enabled = false; ni_pi 2656 drivers/gpu/drm/radeon/si_dpm.c struct ni_power_info *ni_pi = ni_get_pi(rdev); ni_pi 2665 drivers/gpu/drm/radeon/si_dpm.c if (ni_pi->enable_cac == false) ni_pi 2693 drivers/gpu/drm/radeon/si_dpm.c if (si_pi->enable_dte || ni_pi->driver_calculate_cac_leakage) ni_pi 2729 drivers/gpu/drm/radeon/si_dpm.c ni_pi->enable_cac = false; ni_pi 2730 drivers/gpu/drm/radeon/si_dpm.c ni_pi->enable_power_containment = false; ni_pi 2779 drivers/gpu/drm/radeon/si_dpm.c struct ni_power_info *ni_pi = ni_get_pi(rdev); ni_pi 2783 drivers/gpu/drm/radeon/si_dpm.c if ((ni_pi->enable_cac == false) || ni_pi 2784 drivers/gpu/drm/radeon/si_dpm.c (ni_pi->cac_configuration_required == false)) ni_pi 2804 drivers/gpu/drm/radeon/si_dpm.c struct ni_power_info *ni_pi = ni_get_pi(rdev); ni_pi 2809 drivers/gpu/drm/radeon/si_dpm.c if (ni_pi->enable_cac) { ni_pi 2812 drivers/gpu/drm/radeon/si_dpm.c if (ni_pi->support_cac_long_term_average) { ni_pi 2815 drivers/gpu/drm/radeon/si_dpm.c ni_pi->support_cac_long_term_average = false; ni_pi 2821 drivers/gpu/drm/radeon/si_dpm.c ni_pi->cac_enabled = false; ni_pi 2823 drivers/gpu/drm/radeon/si_dpm.c ni_pi->cac_enabled = true; ni_pi 2832 drivers/gpu/drm/radeon/si_dpm.c } else if (ni_pi->cac_enabled) { ni_pi 2838 drivers/gpu/drm/radeon/si_dpm.c ni_pi->cac_enabled = false; ni_pi 2840 drivers/gpu/drm/radeon/si_dpm.c if (ni_pi->support_cac_long_term_average) ni_pi 2849 drivers/gpu/drm/radeon/si_dpm.c struct ni_power_info *ni_pi = ni_get_pi(rdev); ni_pi 2911 drivers/gpu/drm/radeon/si_dpm.c ni_pi->enable_power_containment = false; ni_pi 5194 drivers/gpu/drm/radeon/si_dpm.c struct ni_power_info *ni_pi = ni_get_pi(rdev); ni_pi 5236 drivers/gpu/drm/radeon/si_dpm.c if (ni_pi->enable_power_containment) ni_pi 5260 drivers/gpu/drm/radeon/si_dpm.c ni_pi->enable_power_containment = false; ni_pi 5264 drivers/gpu/drm/radeon/si_dpm.c ni_pi->enable_sq_ramping = false; ni_pi 6904 drivers/gpu/drm/radeon/si_dpm.c struct ni_power_info *ni_pi; ni_pi 6915 drivers/gpu/drm/radeon/si_dpm.c ni_pi = &si_pi->ni; ni_pi 6916 drivers/gpu/drm/radeon/si_dpm.c eg_pi = &ni_pi->eg; ni_pi 7000 drivers/gpu/drm/radeon/si_dpm.c ni_pi->mclk_rtt_mode_threshold = eg_pi->mclk_edc_wr_enable_threshold;