OTG_GLOBAL_CONTROL1 102 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.h uint32_t OTG_GLOBAL_CONTROL1; OTG_GLOBAL_CONTROL1 354 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_optc.c REG_UPDATE(OTG_GLOBAL_CONTROL1, MASTER_UPDATE_LOCK_DB_EN, 1); OTG_GLOBAL_CONTROL1 363 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_optc.c REG_UPDATE_2(OTG_GLOBAL_CONTROL1, OTG_GLOBAL_CONTROL1 374 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_optc.c REG_UPDATE_2(OTG_GLOBAL_CONTROL1, OTG_GLOBAL_CONTROL1 383 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_optc.c REG_UPDATE(OTG_GLOBAL_CONTROL1, MASTER_UPDATE_LOCK_DB_EN, 0); OTG_GLOBAL_CONTROL1 33 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_optc.h SRI(OTG_GLOBAL_CONTROL1, OTG, inst),\