OTG0_OTG_TRIGA_CNTL  231 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.h 	SF(OTG0_OTG_TRIGA_CNTL, OTG_TRIGA_SOURCE_SELECT, mask_sh),\
OTG0_OTG_TRIGA_CNTL  232 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.h 	SF(OTG0_OTG_TRIGA_CNTL, OTG_TRIGA_SOURCE_PIPE_SELECT, mask_sh),\
OTG0_OTG_TRIGA_CNTL  233 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.h 	SF(OTG0_OTG_TRIGA_CNTL, OTG_TRIGA_RISING_EDGE_DETECT_CNTL, mask_sh),\
OTG0_OTG_TRIGA_CNTL  234 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.h 	SF(OTG0_OTG_TRIGA_CNTL, OTG_TRIGA_FALLING_EDGE_DETECT_CNTL, mask_sh),\
OTG0_OTG_TRIGA_CNTL  235 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.h 	SF(OTG0_OTG_TRIGA_CNTL, OTG_TRIGA_POLARITY_SELECT, mask_sh),\
OTG0_OTG_TRIGA_CNTL  236 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.h 	SF(OTG0_OTG_TRIGA_CNTL, OTG_TRIGA_FREQUENCY_SELECT, mask_sh),\
OTG0_OTG_TRIGA_CNTL  237 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.h 	SF(OTG0_OTG_TRIGA_CNTL, OTG_TRIGA_DELAY, mask_sh),\
OTG0_OTG_TRIGA_CNTL  238 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.h 	SF(OTG0_OTG_TRIGA_CNTL, OTG_TRIGA_CLEAR, mask_sh),\