OTG0_OTG_GSL_CONTROL 274 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.h SF(OTG0_OTG_GSL_CONTROL, OTG_GSL0_EN, mask_sh),\ OTG0_OTG_GSL_CONTROL 275 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.h SF(OTG0_OTG_GSL_CONTROL, OTG_GSL1_EN, mask_sh),\ OTG0_OTG_GSL_CONTROL 276 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.h SF(OTG0_OTG_GSL_CONTROL, OTG_GSL2_EN, mask_sh),\ OTG0_OTG_GSL_CONTROL 277 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.h SF(OTG0_OTG_GSL_CONTROL, OTG_GSL_MASTER_EN, mask_sh),\ OTG0_OTG_GSL_CONTROL 278 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.h SF(OTG0_OTG_GSL_CONTROL, OTG_GSL_FORCE_DELAY, mask_sh),\ OTG0_OTG_GSL_CONTROL 279 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.h SF(OTG0_OTG_GSL_CONTROL, OTG_GSL_CHECK_ALL_FIELDS, mask_sh),\ OTG0_OTG_GSL_CONTROL 61 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_optc.h SF(OTG0_OTG_GSL_CONTROL, OTG_GSL_MASTER_MODE, mask_sh), \ OTG0_OTG_GSL_CONTROL 62 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_optc.h SF(OTG0_OTG_GSL_CONTROL, OTG_MASTER_UPDATE_LOCK_GSL_EN, mask_sh), \