OPP_PIPE_CONTROL  382 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_opp.c 	REG_UPDATE(OPP_PIPE_CONTROL, OPP_PIPE_CLOCK_EN, regval);
OPP_PIPE_CONTROL   48 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_opp.h 	SRI(OPP_PIPE_CONTROL, OPP_PIPE, id)
OPP_PIPE_CONTROL   66 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_opp.h 	uint32_t OPP_PIPE_CONTROL