OPPBUF_CONTROL    322 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_opp.c 	REG_UPDATE(OPPBUF_CONTROL, OPPBUF_ACTIVE_WIDTH, active_width);
OPPBUF_CONTROL    352 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_opp.c 	REG_UPDATE(OPPBUF_CONTROL, OPPBUF_ACTIVE_WIDTH, oppbuf->active_width);
OPPBUF_CONTROL    360 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_opp.c 	REG_UPDATE(OPPBUF_CONTROL, OPPBUF_DISPLAY_SEGMENTATION, oppbuf->mso_segmentation);
OPPBUF_CONTROL    363 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_opp.c 	REG_UPDATE(OPPBUF_CONTROL, OPPBUF_OVERLAP_PIXEL_NUM, oppbuf->mso_overlap_pixel_num);
OPPBUF_CONTROL    368 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_opp.c 	REG_UPDATE(OPPBUF_CONTROL, OPPBUF_PIXEL_REPETITION, oppbuf->pixel_repetition);
OPPBUF_CONTROL     45 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_opp.h 	SRI(OPPBUF_CONTROL, OPPBUF, id),\
OPPBUF_CONTROL     62 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_opp.h 	uint32_t OPPBUF_CONTROL; \