new_rps            55 drivers/gpu/drm/amd/amdgpu/kv_dpm.c 					   struct amdgpu_ps *new_rps);
new_rps            61 drivers/gpu/drm/amd/amdgpu/kv_dpm.c 					struct amdgpu_ps *new_rps,
new_rps          1772 drivers/gpu/drm/amd/amdgpu/kv_dpm.c 				     struct amdgpu_ps *new_rps)
new_rps          1774 drivers/gpu/drm/amd/amdgpu/kv_dpm.c 	struct kv_ps *new_ps = kv_get_ps(new_rps);
new_rps          1834 drivers/gpu/drm/amd/amdgpu/kv_dpm.c 					 struct amdgpu_ps *new_rps)
new_rps          1836 drivers/gpu/drm/amd/amdgpu/kv_dpm.c 	struct kv_ps *new_ps = kv_get_ps(new_rps);
new_rps          2205 drivers/gpu/drm/amd/amdgpu/kv_dpm.c 					struct amdgpu_ps *new_rps,
new_rps          2208 drivers/gpu/drm/amd/amdgpu/kv_dpm.c 	struct kv_ps *ps = kv_get_ps(new_rps);
new_rps          2220 drivers/gpu/drm/amd/amdgpu/kv_dpm.c 	if (new_rps->vce_active) {
new_rps          2221 drivers/gpu/drm/amd/amdgpu/kv_dpm.c 		new_rps->evclk = adev->pm.dpm.vce_states[adev->pm.dpm.vce_level].evclk;
new_rps          2222 drivers/gpu/drm/amd/amdgpu/kv_dpm.c 		new_rps->ecclk = adev->pm.dpm.vce_states[adev->pm.dpm.vce_level].ecclk;
new_rps          2224 drivers/gpu/drm/amd/amdgpu/kv_dpm.c 		new_rps->evclk = 0;
new_rps          2225 drivers/gpu/drm/amd/amdgpu/kv_dpm.c 		new_rps->ecclk = 0;
new_rps          2247 drivers/gpu/drm/amd/amdgpu/kv_dpm.c 	if (new_rps->vce_active) {
new_rps          2288 drivers/gpu/drm/amd/amdgpu/kv_dpm.c 	pi->video_start = new_rps->dclk || new_rps->vclk ||
new_rps          2289 drivers/gpu/drm/amd/amdgpu/kv_dpm.c 		new_rps->evclk || new_rps->ecclk;
new_rps          2291 drivers/gpu/drm/amd/amdgpu/kv_dpm.c 	if ((new_rps->class & ATOM_PPLIB_CLASSIFICATION_UI_MASK) ==
new_rps          2497 drivers/gpu/drm/amd/amdgpu/kv_dpm.c 					   struct amdgpu_ps *new_rps)
new_rps          2499 drivers/gpu/drm/amd/amdgpu/kv_dpm.c 	struct kv_ps *new_ps = kv_get_ps(new_rps);
new_rps            46 drivers/gpu/drm/radeon/kv_dpm.c 					   struct radeon_ps *new_rps);
new_rps            52 drivers/gpu/drm/radeon/kv_dpm.c 					struct radeon_ps *new_rps,
new_rps          1708 drivers/gpu/drm/radeon/kv_dpm.c 				     struct radeon_ps *new_rps)
new_rps          1710 drivers/gpu/drm/radeon/kv_dpm.c 	struct kv_ps *new_ps = kv_get_ps(new_rps);
new_rps          1770 drivers/gpu/drm/radeon/kv_dpm.c 					 struct radeon_ps *new_rps)
new_rps          1772 drivers/gpu/drm/radeon/kv_dpm.c 	struct kv_ps *new_ps = kv_get_ps(new_rps);
new_rps          2140 drivers/gpu/drm/radeon/kv_dpm.c 					struct radeon_ps *new_rps,
new_rps          2143 drivers/gpu/drm/radeon/kv_dpm.c 	struct kv_ps *ps = kv_get_ps(new_rps);
new_rps          2155 drivers/gpu/drm/radeon/kv_dpm.c 	if (new_rps->vce_active) {
new_rps          2156 drivers/gpu/drm/radeon/kv_dpm.c 		new_rps->evclk = rdev->pm.dpm.vce_states[rdev->pm.dpm.vce_level].evclk;
new_rps          2157 drivers/gpu/drm/radeon/kv_dpm.c 		new_rps->ecclk = rdev->pm.dpm.vce_states[rdev->pm.dpm.vce_level].ecclk;
new_rps          2159 drivers/gpu/drm/radeon/kv_dpm.c 		new_rps->evclk = 0;
new_rps          2160 drivers/gpu/drm/radeon/kv_dpm.c 		new_rps->ecclk = 0;
new_rps          2182 drivers/gpu/drm/radeon/kv_dpm.c 	if (new_rps->vce_active) {
new_rps          2223 drivers/gpu/drm/radeon/kv_dpm.c 	pi->video_start = new_rps->dclk || new_rps->vclk ||
new_rps          2224 drivers/gpu/drm/radeon/kv_dpm.c 		new_rps->evclk || new_rps->ecclk;
new_rps          2226 drivers/gpu/drm/radeon/kv_dpm.c 	if ((new_rps->class & ATOM_PPLIB_CLASSIFICATION_UI_MASK) ==
new_rps          2432 drivers/gpu/drm/radeon/kv_dpm.c 					   struct radeon_ps *new_rps)
new_rps          2434 drivers/gpu/drm/radeon/kv_dpm.c 	struct kv_ps *new_ps = kv_get_ps(new_rps);
new_rps          5932 drivers/gpu/drm/radeon/si_dpm.c 			     struct radeon_ps *new_rps,
new_rps          5935 drivers/gpu/drm/radeon/si_dpm.c 	if ((old_rps->evclk != new_rps->evclk) ||
new_rps          5936 drivers/gpu/drm/radeon/si_dpm.c 	    (old_rps->ecclk != new_rps->ecclk)) {
new_rps          5938 drivers/gpu/drm/radeon/si_dpm.c 		if (new_rps->evclk || new_rps->ecclk)
new_rps          5942 drivers/gpu/drm/radeon/si_dpm.c 		radeon_set_vce_clocks(rdev, new_rps->evclk, new_rps->ecclk);
new_rps           678 drivers/gpu/drm/radeon/sumo_dpm.c 					     struct radeon_ps *new_rps,
new_rps           681 drivers/gpu/drm/radeon/sumo_dpm.c 	struct sumo_ps *new_ps = sumo_get_ps(new_rps);
new_rps           696 drivers/gpu/drm/radeon/sumo_dpm.c 					      struct radeon_ps *new_rps,
new_rps           699 drivers/gpu/drm/radeon/sumo_dpm.c 	struct sumo_ps *new_ps = sumo_get_ps(new_rps);
new_rps           752 drivers/gpu/drm/radeon/sumo_dpm.c 					     struct radeon_ps *new_rps,
new_rps           756 drivers/gpu/drm/radeon/sumo_dpm.c 	struct sumo_ps *new_ps = sumo_get_ps(new_rps);
new_rps           815 drivers/gpu/drm/radeon/sumo_dpm.c 				  struct radeon_ps *new_rps,
new_rps           824 drivers/gpu/drm/radeon/sumo_dpm.c 	radeon_set_uvd_clocks(rdev, new_rps->vclk, new_rps->dclk);
new_rps           828 drivers/gpu/drm/radeon/sumo_dpm.c 		    !r600_is_uvd_state(new_rps->class, new_rps->class2))
new_rps           834 drivers/gpu/drm/radeon/sumo_dpm.c 						    struct radeon_ps *new_rps,
new_rps           837 drivers/gpu/drm/radeon/sumo_dpm.c 	struct sumo_ps *new_ps = sumo_get_ps(new_rps);
new_rps           840 drivers/gpu/drm/radeon/sumo_dpm.c 	if ((new_rps->vclk == old_rps->vclk) &&
new_rps           841 drivers/gpu/drm/radeon/sumo_dpm.c 	    (new_rps->dclk == old_rps->dclk))
new_rps           848 drivers/gpu/drm/radeon/sumo_dpm.c 	sumo_setup_uvd_clocks(rdev, new_rps, old_rps);
new_rps           852 drivers/gpu/drm/radeon/sumo_dpm.c 						   struct radeon_ps *new_rps,
new_rps           855 drivers/gpu/drm/radeon/sumo_dpm.c 	struct sumo_ps *new_ps = sumo_get_ps(new_rps);
new_rps           858 drivers/gpu/drm/radeon/sumo_dpm.c 	if ((new_rps->vclk == old_rps->vclk) &&
new_rps           859 drivers/gpu/drm/radeon/sumo_dpm.c 	    (new_rps->dclk == old_rps->dclk))
new_rps           866 drivers/gpu/drm/radeon/sumo_dpm.c 	sumo_setup_uvd_clocks(rdev, new_rps, old_rps);
new_rps          1087 drivers/gpu/drm/radeon/sumo_dpm.c 					  struct radeon_ps *new_rps,
new_rps          1090 drivers/gpu/drm/radeon/sumo_dpm.c 	struct sumo_ps *ps = sumo_get_ps(new_rps);
new_rps          1098 drivers/gpu/drm/radeon/sumo_dpm.c 	if (new_rps->class & ATOM_PPLIB_CLASSIFICATION_THERMAL)
new_rps          1102 drivers/gpu/drm/radeon/sumo_dpm.c 		if (new_rps->class & ATOM_PPLIB_CLASSIFICATION_UI_PERFORMANCE)
new_rps          1106 drivers/gpu/drm/radeon/sumo_dpm.c 	if ((new_rps->class & ATOM_PPLIB_CLASSIFICATION_UI_BATTERY) ||
new_rps          1107 drivers/gpu/drm/radeon/sumo_dpm.c 	    (new_rps->class & ATOM_PPLIB_CLASSIFICATION_SDSTATE) ||
new_rps          1108 drivers/gpu/drm/radeon/sumo_dpm.c 	    (new_rps->class & ATOM_PPLIB_CLASSIFICATION_HDSTATE))
new_rps          1141 drivers/gpu/drm/radeon/sumo_dpm.c 		else if ((new_rps->class & ATOM_PPLIB_CLASSIFICATION_UVDSTATE) ||
new_rps          1142 drivers/gpu/drm/radeon/sumo_dpm.c 			 (new_rps->class2 & ATOM_PPLIB_CLASSIFICATION2_MVC))
new_rps           346 drivers/gpu/drm/radeon/trinity_dpm.c 					     struct radeon_ps *new_rps,
new_rps           841 drivers/gpu/drm/radeon/trinity_dpm.c 						struct radeon_ps *new_rps,
new_rps           844 drivers/gpu/drm/radeon/trinity_dpm.c 	struct trinity_ps *new_ps = trinity_get_ps(new_rps);
new_rps           923 drivers/gpu/drm/radeon/trinity_dpm.c 				     struct radeon_ps *new_rps,
new_rps           933 drivers/gpu/drm/radeon/trinity_dpm.c 		if (trinity_uvd_clocks_zero(new_rps) &&
new_rps           936 drivers/gpu/drm/radeon/trinity_dpm.c 		} else if (!trinity_uvd_clocks_zero(new_rps)) {
new_rps           937 drivers/gpu/drm/radeon/trinity_dpm.c 			trinity_setup_uvd_clock_table(rdev, new_rps);
new_rps           944 drivers/gpu/drm/radeon/trinity_dpm.c 				radeon_set_uvd_clocks(rdev, new_rps->vclk, new_rps->dclk);
new_rps           951 drivers/gpu/drm/radeon/trinity_dpm.c 		if (trinity_uvd_clocks_zero(new_rps) ||
new_rps           952 drivers/gpu/drm/radeon/trinity_dpm.c 		    trinity_uvd_clocks_equal(new_rps, old_rps))
new_rps           955 drivers/gpu/drm/radeon/trinity_dpm.c 		radeon_set_uvd_clocks(rdev, new_rps->vclk, new_rps->dclk);
new_rps           964 drivers/gpu/drm/radeon/trinity_dpm.c 						       struct radeon_ps *new_rps,
new_rps           967 drivers/gpu/drm/radeon/trinity_dpm.c 	struct trinity_ps *new_ps = trinity_get_ps(new_rps);
new_rps           968 drivers/gpu/drm/radeon/trinity_dpm.c 	struct trinity_ps *current_ps = trinity_get_ps(new_rps);
new_rps           974 drivers/gpu/drm/radeon/trinity_dpm.c 	trinity_setup_uvd_clocks(rdev, new_rps, old_rps);
new_rps           978 drivers/gpu/drm/radeon/trinity_dpm.c 						      struct radeon_ps *new_rps,
new_rps           981 drivers/gpu/drm/radeon/trinity_dpm.c 	struct trinity_ps *new_ps = trinity_get_ps(new_rps);
new_rps           988 drivers/gpu/drm/radeon/trinity_dpm.c 	trinity_setup_uvd_clocks(rdev, new_rps, old_rps);
new_rps           992 drivers/gpu/drm/radeon/trinity_dpm.c 				  struct radeon_ps *new_rps,
new_rps           995 drivers/gpu/drm/radeon/trinity_dpm.c 	if ((old_rps->evclk != new_rps->evclk) ||
new_rps           996 drivers/gpu/drm/radeon/trinity_dpm.c 	    (old_rps->ecclk != new_rps->ecclk)) {
new_rps           998 drivers/gpu/drm/radeon/trinity_dpm.c 		if (new_rps->evclk || new_rps->ecclk)
new_rps          1002 drivers/gpu/drm/radeon/trinity_dpm.c 		radeon_set_vce_clocks(rdev, new_rps->evclk, new_rps->ecclk);
new_rps          1536 drivers/gpu/drm/radeon/trinity_dpm.c 					     struct radeon_ps *new_rps,
new_rps          1539 drivers/gpu/drm/radeon/trinity_dpm.c 	struct trinity_ps *ps = trinity_get_ps(new_rps);
new_rps          1550 drivers/gpu/drm/radeon/trinity_dpm.c 	if (new_rps->class & ATOM_PPLIB_CLASSIFICATION_THERMAL)
new_rps          1553 drivers/gpu/drm/radeon/trinity_dpm.c 	trinity_adjust_uvd_state(rdev, new_rps);
new_rps          1555 drivers/gpu/drm/radeon/trinity_dpm.c 	if (new_rps->vce_active) {
new_rps          1556 drivers/gpu/drm/radeon/trinity_dpm.c 		new_rps->evclk = rdev->pm.dpm.vce_states[rdev->pm.dpm.vce_level].evclk;
new_rps          1557 drivers/gpu/drm/radeon/trinity_dpm.c 		new_rps->ecclk = rdev->pm.dpm.vce_states[rdev->pm.dpm.vce_level].ecclk;
new_rps          1559 drivers/gpu/drm/radeon/trinity_dpm.c 		new_rps->evclk = 0;
new_rps          1560 drivers/gpu/drm/radeon/trinity_dpm.c 		new_rps->ecclk = 0;
new_rps          1572 drivers/gpu/drm/radeon/trinity_dpm.c 		if (new_rps->vce_active) {
new_rps          1577 drivers/gpu/drm/radeon/trinity_dpm.c 			trinity_get_vce_clock_voltage(rdev, new_rps->evclk, new_rps->ecclk, &min_vce_voltage);
new_rps          1595 drivers/gpu/drm/radeon/trinity_dpm.c 	if ((new_rps->class & (ATOM_PPLIB_CLASSIFICATION_HDSTATE | ATOM_PPLIB_CLASSIFICATION_SDSTATE)) ||
new_rps          1596 drivers/gpu/drm/radeon/trinity_dpm.c 	    ((new_rps->class & ATOM_PPLIB_CLASSIFICATION_UI_MASK) == ATOM_PPLIB_CLASSIFICATION_UI_BATTERY))
new_rps          1605 drivers/gpu/drm/radeon/trinity_dpm.c 		if ((new_rps->class & (ATOM_PPLIB_CLASSIFICATION_HDSTATE | ATOM_PPLIB_CLASSIFICATION_SDSTATE)) ||
new_rps          1606 drivers/gpu/drm/radeon/trinity_dpm.c 		    ((new_rps->class & ATOM_PPLIB_CLASSIFICATION_UI_MASK) == ATOM_PPLIB_CLASSIFICATION_UI_BATTERY)) {
new_rps          1607 drivers/gpu/drm/radeon/trinity_dpm.c 			force_high = ((new_rps->class & ATOM_PPLIB_CLASSIFICATION_HDSTATE) ||
new_rps          1608 drivers/gpu/drm/radeon/trinity_dpm.c 				      ((new_rps->class & ATOM_PPLIB_CLASSIFICATION_SDSTATE) &&