new_reg 931 arch/mips/cavium-octeon/octeon-platform.c __be32 new_reg[6]; new_reg 991 arch/mips/cavium-octeon/octeon-platform.c new_reg[0] = cpu_to_be32(cs); new_reg 992 arch/mips/cavium-octeon/octeon-platform.c new_reg[1] = cpu_to_be32(0); new_reg 993 arch/mips/cavium-octeon/octeon-platform.c new_reg[2] = cpu_to_be32(0x10000); new_reg 994 arch/mips/cavium-octeon/octeon-platform.c new_reg[3] = cpu_to_be32(cs + 1); new_reg 995 arch/mips/cavium-octeon/octeon-platform.c new_reg[4] = cpu_to_be32(0); new_reg 996 arch/mips/cavium-octeon/octeon-platform.c new_reg[5] = cpu_to_be32(0x10000); new_reg 998 arch/mips/cavium-octeon/octeon-platform.c "reg", new_reg, sizeof(new_reg)); new_reg 1031 arch/mips/cavium-octeon/octeon-platform.c __be32 new_reg[6]; new_reg 1052 arch/mips/cavium-octeon/octeon-platform.c new_reg[0] = cpu_to_be32(cs); new_reg 1053 arch/mips/cavium-octeon/octeon-platform.c new_reg[1] = cpu_to_be32(0x20); new_reg 1054 arch/mips/cavium-octeon/octeon-platform.c new_reg[2] = cpu_to_be32(0x20); new_reg 1055 arch/mips/cavium-octeon/octeon-platform.c new_reg[3] = cpu_to_be32(cs); new_reg 1056 arch/mips/cavium-octeon/octeon-platform.c new_reg[4] = cpu_to_be32(0); new_reg 1057 arch/mips/cavium-octeon/octeon-platform.c new_reg[5] = cpu_to_be32(0x20); new_reg 1059 arch/mips/cavium-octeon/octeon-platform.c "reg", new_reg, sizeof(new_reg)); new_reg 667 drivers/ata/sata_nv.c u32 current_reg, new_reg, config_mask; new_reg 710 drivers/ata/sata_nv.c new_reg = current_reg | config_mask; new_reg 713 drivers/ata/sata_nv.c new_reg = current_reg & ~config_mask; new_reg 717 drivers/ata/sata_nv.c if (current_reg != new_reg) new_reg 718 drivers/ata/sata_nv.c pci_write_config_dword(pdev, NV_MCP_SATA_CFG_20, new_reg); new_reg 752 drivers/gpu/drm/nouveau/nouveau_bo.c struct ttm_mem_reg *old_reg, struct ttm_mem_reg *new_reg) new_reg 765 drivers/gpu/drm/nouveau/nouveau_bo.c OUT_RING (chan, new_reg->num_pages); new_reg 784 drivers/gpu/drm/nouveau/nouveau_bo.c struct ttm_mem_reg *old_reg, struct ttm_mem_reg *new_reg) new_reg 789 drivers/gpu/drm/nouveau/nouveau_bo.c u32 page_count = new_reg->num_pages; new_reg 792 drivers/gpu/drm/nouveau/nouveau_bo.c page_count = new_reg->num_pages; new_reg 822 drivers/gpu/drm/nouveau/nouveau_bo.c struct ttm_mem_reg *old_reg, struct ttm_mem_reg *new_reg) new_reg 827 drivers/gpu/drm/nouveau/nouveau_bo.c u32 page_count = new_reg->num_pages; new_reg 830 drivers/gpu/drm/nouveau/nouveau_bo.c page_count = new_reg->num_pages; new_reg 861 drivers/gpu/drm/nouveau/nouveau_bo.c struct ttm_mem_reg *old_reg, struct ttm_mem_reg *new_reg) new_reg 866 drivers/gpu/drm/nouveau/nouveau_bo.c u32 page_count = new_reg->num_pages; new_reg 869 drivers/gpu/drm/nouveau/nouveau_bo.c page_count = new_reg->num_pages; new_reg 899 drivers/gpu/drm/nouveau/nouveau_bo.c struct ttm_mem_reg *old_reg, struct ttm_mem_reg *new_reg) new_reg 910 drivers/gpu/drm/nouveau/nouveau_bo.c OUT_RING (chan, new_reg->num_pages << PAGE_SHIFT); new_reg 917 drivers/gpu/drm/nouveau/nouveau_bo.c struct ttm_mem_reg *old_reg, struct ttm_mem_reg *new_reg) new_reg 923 drivers/gpu/drm/nouveau/nouveau_bo.c OUT_RING (chan, new_reg->num_pages << PAGE_SHIFT); new_reg 951 drivers/gpu/drm/nouveau/nouveau_bo.c struct ttm_mem_reg *old_reg, struct ttm_mem_reg *new_reg) new_reg 954 drivers/gpu/drm/nouveau/nouveau_bo.c u64 length = (new_reg->num_pages << PAGE_SHIFT); new_reg 958 drivers/gpu/drm/nouveau/nouveau_bo.c int dst_tiled = !!nouveau_mem(new_reg)->kind; new_reg 1047 drivers/gpu/drm/nouveau/nouveau_bo.c struct ttm_mem_reg *old_reg, struct ttm_mem_reg *new_reg) new_reg 1050 drivers/gpu/drm/nouveau/nouveau_bo.c u32 dst_offset = new_reg->start << PAGE_SHIFT; new_reg 1051 drivers/gpu/drm/nouveau/nouveau_bo.c u32 page_count = new_reg->num_pages; new_reg 1060 drivers/gpu/drm/nouveau/nouveau_bo.c OUT_RING (chan, nouveau_bo_mem_ctxdma(bo, chan, new_reg)); new_reg 1062 drivers/gpu/drm/nouveau/nouveau_bo.c page_count = new_reg->num_pages; new_reg 1125 drivers/gpu/drm/nouveau/nouveau_bo.c bool no_wait_gpu, struct ttm_mem_reg *new_reg) new_reg 1138 drivers/gpu/drm/nouveau/nouveau_bo.c ret = nouveau_bo_move_prep(drm, bo, new_reg); new_reg 1146 drivers/gpu/drm/nouveau/nouveau_bo.c ret = drm->ttm.move(chan, bo, &bo->mem, new_reg); new_reg 1153 drivers/gpu/drm/nouveau/nouveau_bo.c new_reg); new_reg 1232 drivers/gpu/drm/nouveau/nouveau_bo.c bool no_wait_gpu, struct ttm_mem_reg *new_reg) new_reg 1247 drivers/gpu/drm/nouveau/nouveau_bo.c tmp_reg = *new_reg; new_reg 1261 drivers/gpu/drm/nouveau/nouveau_bo.c ret = ttm_bo_move_ttm(bo, &ctx, new_reg); new_reg 1269 drivers/gpu/drm/nouveau/nouveau_bo.c bool no_wait_gpu, struct ttm_mem_reg *new_reg) new_reg 1284 drivers/gpu/drm/nouveau/nouveau_bo.c tmp_reg = *new_reg; new_reg 1294 drivers/gpu/drm/nouveau/nouveau_bo.c ret = nouveau_bo_move_m2mf(bo, true, intr, no_wait_gpu, new_reg); new_reg 1305 drivers/gpu/drm/nouveau/nouveau_bo.c struct ttm_mem_reg *new_reg) new_reg 1307 drivers/gpu/drm/nouveau/nouveau_bo.c struct nouveau_mem *mem = new_reg ? nouveau_mem(new_reg) : NULL; new_reg 1315 drivers/gpu/drm/nouveau/nouveau_bo.c if (mem && new_reg->mem_type != TTM_PL_SYSTEM && new_reg 1329 drivers/gpu/drm/nouveau/nouveau_bo.c nouveau_bo_vm_bind(struct ttm_buffer_object *bo, struct ttm_mem_reg *new_reg, new_reg 1335 drivers/gpu/drm/nouveau/nouveau_bo.c u64 offset = new_reg->start << PAGE_SHIFT; new_reg 1338 drivers/gpu/drm/nouveau/nouveau_bo.c if (new_reg->mem_type != TTM_PL_VRAM) new_reg 1342 drivers/gpu/drm/nouveau/nouveau_bo.c *new_tile = nv10_bo_set_tiling(dev, offset, new_reg->size, new_reg 1365 drivers/gpu/drm/nouveau/nouveau_bo.c struct ttm_mem_reg *new_reg) new_reg 1381 drivers/gpu/drm/nouveau/nouveau_bo.c ret = nouveau_bo_vm_bind(bo, new_reg, &new_tile); new_reg 1389 drivers/gpu/drm/nouveau/nouveau_bo.c bo->mem = *new_reg; new_reg 1390 drivers/gpu/drm/nouveau/nouveau_bo.c new_reg->mm_node = NULL; new_reg 1396 drivers/gpu/drm/nouveau/nouveau_bo.c if (new_reg->mem_type == TTM_PL_SYSTEM) new_reg 1399 drivers/gpu/drm/nouveau/nouveau_bo.c ctx->no_wait_gpu, new_reg); new_reg 1403 drivers/gpu/drm/nouveau/nouveau_bo.c ctx->no_wait_gpu, new_reg); new_reg 1407 drivers/gpu/drm/nouveau/nouveau_bo.c ctx->no_wait_gpu, new_reg); new_reg 1415 drivers/gpu/drm/nouveau/nouveau_bo.c ret = ttm_bo_move_memcpy(bo, ctx, new_reg); new_reg 3155 drivers/target/target_core_pr.c int new_reg = 0, type, scope, matching_iname; new_reg 3466 drivers/target/target_core_pr.c new_reg = 1; new_reg 3487 drivers/target/target_core_pr.c if (!new_reg) new_reg 646 drivers/tty/serial/ip22zilog.c unsigned char new_reg; new_reg 648 drivers/tty/serial/ip22zilog.c new_reg = up->curregs[R15] | (DCDIE | SYNCIE | CTSIE); new_reg 649 drivers/tty/serial/ip22zilog.c if (new_reg != up->curregs[R15]) { new_reg 650 drivers/tty/serial/ip22zilog.c up->curregs[R15] = new_reg; new_reg 663 drivers/tty/serial/ip22zilog.c unsigned char set_bits, clear_bits, new_reg; new_reg 675 drivers/tty/serial/ip22zilog.c new_reg = (up->curregs[R5] | set_bits) & ~clear_bits; new_reg 676 drivers/tty/serial/ip22zilog.c if (new_reg != up->curregs[R5]) { new_reg 677 drivers/tty/serial/ip22zilog.c up->curregs[R5] = new_reg; new_reg 681 drivers/tty/serial/pmac_zilog.c unsigned char new_reg; new_reg 685 drivers/tty/serial/pmac_zilog.c new_reg = uap->curregs[R15] | (DCDIE | SYNCIE | CTSIE); new_reg 686 drivers/tty/serial/pmac_zilog.c if (new_reg != uap->curregs[R15]) { new_reg 687 drivers/tty/serial/pmac_zilog.c uap->curregs[R15] = new_reg; new_reg 701 drivers/tty/serial/pmac_zilog.c unsigned char set_bits, clear_bits, new_reg; new_reg 713 drivers/tty/serial/pmac_zilog.c new_reg = (uap->curregs[R5] | set_bits) & ~clear_bits; new_reg 714 drivers/tty/serial/pmac_zilog.c if (new_reg != uap->curregs[R5]) { new_reg 715 drivers/tty/serial/pmac_zilog.c uap->curregs[R5] = new_reg; new_reg 746 drivers/tty/serial/sunzilog.c unsigned char new_reg; new_reg 748 drivers/tty/serial/sunzilog.c new_reg = up->curregs[R15] | (DCDIE | SYNCIE | CTSIE); new_reg 749 drivers/tty/serial/sunzilog.c if (new_reg != up->curregs[R15]) { new_reg 750 drivers/tty/serial/sunzilog.c up->curregs[R15] = new_reg; new_reg 763 drivers/tty/serial/sunzilog.c unsigned char set_bits, clear_bits, new_reg; new_reg 775 drivers/tty/serial/sunzilog.c new_reg = (up->curregs[R5] | set_bits) & ~clear_bits; new_reg 776 drivers/tty/serial/sunzilog.c if (new_reg != up->curregs[R5]) { new_reg 777 drivers/tty/serial/sunzilog.c up->curregs[R5] = new_reg; new_reg 566 sound/pci/oxygen/oxygen.c u16 old_reg, new_reg; new_reg 571 sound/pci/oxygen/oxygen.c new_reg = old_reg & ~GPIO_MERIDIAN_DIG_MASK; new_reg 573 sound/pci/oxygen/oxygen.c new_reg |= GPIO_MERIDIAN_DIG_BOARD; new_reg 575 sound/pci/oxygen/oxygen.c new_reg |= GPIO_MERIDIAN_DIG_EXT; new_reg 576 sound/pci/oxygen/oxygen.c changed = new_reg != old_reg; new_reg 578 sound/pci/oxygen/oxygen.c oxygen_write16(chip, OXYGEN_GPIO_DATA, new_reg); new_reg 587 sound/pci/oxygen/oxygen.c u16 old_reg, new_reg; new_reg 592 sound/pci/oxygen/oxygen.c new_reg = old_reg & ~GPIO_CLARO_DIG_COAX; new_reg 594 sound/pci/oxygen/oxygen.c new_reg |= GPIO_CLARO_DIG_COAX; new_reg 595 sound/pci/oxygen/oxygen.c changed = new_reg != old_reg; new_reg 597 sound/pci/oxygen/oxygen.c oxygen_write16(chip, OXYGEN_GPIO_DATA, new_reg); new_reg 434 sound/soc/ux500/ux500_msp_i2s.c u32 old_reg, new_reg, mask; new_reg 472 sound/soc/ux500/ux500_msp_i2s.c new_reg = (config->tx_clk_sel | config->rx_clk_sel | new_reg 481 sound/soc/ux500/ux500_msp_i2s.c new_reg |= old_reg; new_reg 482 sound/soc/ux500/ux500_msp_i2s.c writel(new_reg, msp->registers + MSP_GCR); new_reg 194 tools/perf/arch/x86/util/perf_regs.c char new_reg[SDT_REG_NAME_SIZE] = {0}; new_reg 252 tools/perf/arch/x86/util/perf_regs.c new_reg); new_reg 258 tools/perf/arch/x86/util/perf_regs.c strlen(new_reg) + new_reg 270 tools/perf/arch/x86/util/perf_regs.c strlen(new_reg), new_reg,