new_crtc_state 1172 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c struct drm_crtc_state *new_crtc_state; new_crtc_state 1233 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c for_each_new_crtc_in_state(dm->cached_state, crtc, new_crtc_state, i) new_crtc_state 1234 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c new_crtc_state->active_changed = true; new_crtc_state 1241 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c for_each_new_crtc_in_state(dm->cached_state, crtc, new_crtc_state, i) { new_crtc_state 1242 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c dm_new_crtc_state = to_dm_crtc_state(new_crtc_state); new_crtc_state 4238 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c struct drm_crtc_state *new_crtc_state; new_crtc_state 4251 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c new_crtc_state = drm_atomic_get_crtc_state(state, crtc); new_crtc_state 4252 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c if (IS_ERR(new_crtc_state)) new_crtc_state 4253 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c return PTR_ERR(new_crtc_state); new_crtc_state 4266 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c new_crtc_state->mode_changed = new_crtc_state 4291 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c static bool does_crtc_have_active_cursor(struct drm_crtc_state *new_crtc_state) new_crtc_state 4293 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c struct drm_device *dev = new_crtc_state->crtc->dev; new_crtc_state 4296 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c drm_for_each_plane_mask(plane, dev, new_crtc_state->plane_mask) { new_crtc_state 4304 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c static int count_crtc_active_planes(struct drm_crtc_state *new_crtc_state) new_crtc_state 4306 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c struct drm_atomic_state *state = new_crtc_state->state; new_crtc_state 4310 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c drm_for_each_plane_mask(plane, state->dev, new_crtc_state->plane_mask) { new_crtc_state 4343 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c struct drm_crtc_state *new_crtc_state) new_crtc_state 4346 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c to_dm_crtc_state(new_crtc_state); new_crtc_state 4355 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c count_crtc_active_planes(new_crtc_state); new_crtc_state 5499 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c struct dm_crtc_state *new_crtc_state, new_crtc_state 5521 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c vrr_params = new_crtc_state->vrr_params; new_crtc_state 5532 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c amdgpu_dm_vrr_active(new_crtc_state)) { new_crtc_state 5538 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c new_crtc_state->stream, new_crtc_state 5551 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c new_crtc_state->freesync_timing_changed |= new_crtc_state 5552 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c (memcmp(&new_crtc_state->vrr_params.adjust, new_crtc_state 5556 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c new_crtc_state->freesync_vrr_info_changed |= new_crtc_state 5557 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c (memcmp(&new_crtc_state->vrr_infopacket, new_crtc_state 5561 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c new_crtc_state->vrr_params = vrr_params; new_crtc_state 5562 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c new_crtc_state->vrr_infopacket = vrr_infopacket; new_crtc_state 5564 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c new_stream->adjust = new_crtc_state->vrr_params.adjust; new_crtc_state 5567 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c if (new_crtc_state->freesync_vrr_info_changed) new_crtc_state 5569 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c new_crtc_state->base.crtc->base.id, new_crtc_state 5570 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c (int)new_crtc_state->base.vrr_enabled, new_crtc_state 5578 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c struct dm_crtc_state *new_crtc_state) new_crtc_state 5580 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c struct dc_stream_state *new_stream = new_crtc_state->stream; new_crtc_state 5582 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c struct mod_freesync_config config = new_crtc_state->freesync_config; new_crtc_state 5597 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c vrr_params = new_crtc_state->vrr_params; new_crtc_state 5599 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c if (new_crtc_state->vrr_supported && new_crtc_state 5602 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c config.state = new_crtc_state->base.vrr_enabled ? new_crtc_state 5613 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c new_crtc_state->freesync_timing_changed |= new_crtc_state 5614 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c (memcmp(&new_crtc_state->vrr_params.adjust, new_crtc_state 5618 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c new_crtc_state->vrr_params = vrr_params; new_crtc_state 5719 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c struct drm_crtc_state *new_crtc_state; new_crtc_state 5732 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c new_crtc_state = drm_atomic_get_new_crtc_state(state, crtc); new_crtc_state 5733 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c if (!new_crtc_state->active) new_crtc_state 5962 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c struct drm_crtc_state *new_crtc_state; new_crtc_state 5977 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c new_crtc_state = drm_atomic_get_new_crtc_state( new_crtc_state 5980 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c if (!new_crtc_state) new_crtc_state 5983 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c if (!drm_atomic_crtc_needs_modeset(new_crtc_state)) new_crtc_state 6002 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c new_crtc_state = drm_atomic_get_new_crtc_state( new_crtc_state 6005 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c if (!new_crtc_state) new_crtc_state 6008 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c if (!drm_atomic_crtc_needs_modeset(new_crtc_state)) new_crtc_state 6011 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c new_dm_crtc_state = to_dm_crtc_state(new_crtc_state); new_crtc_state 6048 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c struct drm_crtc_state *old_crtc_state, *new_crtc_state; new_crtc_state 6055 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c new_crtc_state, i) { new_crtc_state 6058 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c to_dm_crtc_state(new_crtc_state); new_crtc_state 6061 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c bool modeset = drm_atomic_crtc_needs_modeset(new_crtc_state); new_crtc_state 6107 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c struct drm_crtc_state *old_crtc_state, *new_crtc_state; new_crtc_state 6126 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c for_each_oldnew_crtc_in_state(state, crtc, old_crtc_state, new_crtc_state, i) { new_crtc_state 6128 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c struct dm_crtc_state *dm_new_crtc_state = to_dm_crtc_state(new_crtc_state); new_crtc_state 6133 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c drm_atomic_crtc_needs_modeset(new_crtc_state))) new_crtc_state 6163 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c struct drm_crtc_state *old_crtc_state, *new_crtc_state; new_crtc_state 6185 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c for_each_oldnew_crtc_in_state(state, crtc, old_crtc_state, new_crtc_state, i) { new_crtc_state 6188 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c dm_new_crtc_state = to_dm_crtc_state(new_crtc_state); new_crtc_state 6196 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c new_crtc_state->enable, new_crtc_state 6197 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c new_crtc_state->active, new_crtc_state 6198 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c new_crtc_state->planes_changed, new_crtc_state 6199 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c new_crtc_state->mode_changed, new_crtc_state 6200 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c new_crtc_state->active_changed, new_crtc_state 6201 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c new_crtc_state->connectors_changed); new_crtc_state 6213 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c if (modeset_required(new_crtc_state, dm_new_crtc_state->stream, dm_old_crtc_state->stream)) { new_crtc_state 6244 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c acrtc->hw_mode = new_crtc_state->mode; new_crtc_state 6245 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c crtc->hwmode = new_crtc_state->mode; new_crtc_state 6246 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c } else if (modereset_required(new_crtc_state)) { new_crtc_state 6262 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c for_each_new_crtc_in_state(state, crtc, new_crtc_state, i) { new_crtc_state 6265 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c dm_new_crtc_state = to_dm_crtc_state(new_crtc_state); new_crtc_state 6297 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c new_crtc_state = drm_atomic_get_new_crtc_state(state, &acrtc->base); new_crtc_state 6302 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c if (!acrtc || drm_atomic_crtc_needs_modeset(new_crtc_state)) new_crtc_state 6305 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c dm_new_crtc_state = to_dm_crtc_state(new_crtc_state); new_crtc_state 6364 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c new_crtc_state, i) { new_crtc_state 6365 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c if (old_crtc_state->active && !new_crtc_state->active) new_crtc_state 6368 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c dm_new_crtc_state = to_dm_crtc_state(new_crtc_state); new_crtc_state 6382 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c for_each_new_crtc_in_state(state, crtc, new_crtc_state, j) new_crtc_state 6383 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c if (new_crtc_state->async_flip) new_crtc_state 6387 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c for_each_new_crtc_in_state(state, crtc, new_crtc_state, j) { new_crtc_state 6388 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c dm_new_crtc_state = to_dm_crtc_state(new_crtc_state); new_crtc_state 6406 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c for_each_new_crtc_in_state(state, crtc, new_crtc_state, i) { new_crtc_state 6408 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c if (new_crtc_state->event) new_crtc_state 6409 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c drm_send_event_locked(dev, &new_crtc_state->event->base); new_crtc_state 6411 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c new_crtc_state->event = NULL; new_crtc_state 6578 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c struct dm_crtc_state *new_crtc_state, new_crtc_state 6584 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c struct drm_display_mode *mode = &new_crtc_state->base.mode; new_crtc_state 6587 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c new_crtc_state->vrr_supported = new_con_state->freesync_capable && new_crtc_state 6591 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c if (new_crtc_state->vrr_supported) { new_crtc_state 6592 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c new_crtc_state->stream->ignore_msa_timing_param = true; new_crtc_state 6593 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c config.state = new_crtc_state->base.vrr_enabled ? new_crtc_state 6604 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c new_crtc_state->freesync_config = config; new_crtc_state 6608 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c struct dm_crtc_state *new_crtc_state) new_crtc_state 6610 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c new_crtc_state->vrr_supported = false; new_crtc_state 6612 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c memset(&new_crtc_state->vrr_params, 0, new_crtc_state 6613 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c sizeof(new_crtc_state->vrr_params)); new_crtc_state 6614 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c memset(&new_crtc_state->vrr_infopacket, 0, new_crtc_state 6615 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c sizeof(new_crtc_state->vrr_infopacket)); new_crtc_state 6622 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c struct drm_crtc_state *new_crtc_state, new_crtc_state 6643 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c dm_new_crtc_state = to_dm_crtc_state(new_crtc_state); new_crtc_state 6663 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c if (!drm_atomic_crtc_needs_modeset(new_crtc_state)) new_crtc_state 6667 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c &new_crtc_state->mode, new_crtc_state 6704 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c new_crtc_state->mode_changed = false; new_crtc_state 6706 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c new_crtc_state->mode_changed); new_crtc_state 6711 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c if (!drm_atomic_crtc_needs_modeset(new_crtc_state)) new_crtc_state 6719 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c new_crtc_state->enable, new_crtc_state 6720 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c new_crtc_state->active, new_crtc_state 6721 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c new_crtc_state->planes_changed, new_crtc_state 6722 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c new_crtc_state->mode_changed, new_crtc_state 6723 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c new_crtc_state->active_changed, new_crtc_state 6724 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c new_crtc_state->connectors_changed); new_crtc_state 6764 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c if (modereset_required(new_crtc_state)) new_crtc_state 6767 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c if (modeset_required(new_crtc_state, new_stream, new_crtc_state 6804 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c if (!(enable && aconnector && new_crtc_state->enable && new_crtc_state 6805 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c new_crtc_state->active)) new_crtc_state 6820 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c &new_crtc_state->mode, dm_new_conn_state, dm_new_crtc_state->stream); new_crtc_state 6830 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c drm_atomic_crtc_needs_modeset(new_crtc_state)) { new_crtc_state 6855 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c struct drm_crtc_state *new_crtc_state; new_crtc_state 6874 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c new_crtc_state = new_crtc_state 6877 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c if (!new_crtc_state) new_crtc_state 6881 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c if (new_crtc_state->color_mgmt_changed) new_crtc_state 6884 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c if (drm_atomic_crtc_needs_modeset(new_crtc_state)) new_crtc_state 6926 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c struct drm_crtc_state *old_crtc_state, *new_crtc_state; new_crtc_state 7007 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c new_crtc_state = drm_atomic_get_new_crtc_state(state, new_plane_crtc); new_crtc_state 7008 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c dm_new_crtc_state = to_dm_crtc_state(new_crtc_state); new_crtc_state 7029 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c new_crtc_state); new_crtc_state 7086 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c struct drm_crtc_state *new_crtc_state, *old_crtc_state; new_crtc_state 7102 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c for_each_oldnew_crtc_in_state(state, crtc, old_crtc_state, new_crtc_state, i) { new_crtc_state 7108 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c new_dm_crtc_state = to_dm_crtc_state(new_crtc_state); new_crtc_state 7145 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c if (new_crtc_state->mode_changed) { new_crtc_state 7150 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c if (new_crtc_state->color_mgmt_changed) { new_crtc_state 7264 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c struct drm_crtc_state *old_crtc_state, *new_crtc_state; new_crtc_state 7282 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c for_each_oldnew_crtc_in_state(state, crtc, old_crtc_state, new_crtc_state, i) { new_crtc_state 7283 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c if (!drm_atomic_crtc_needs_modeset(new_crtc_state) && new_crtc_state 7284 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c !new_crtc_state->color_mgmt_changed && new_crtc_state 7285 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c old_crtc_state->vrr_enabled == new_crtc_state->vrr_enabled) new_crtc_state 7288 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c if (!new_crtc_state->enable) new_crtc_state 7348 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c for_each_oldnew_crtc_in_state(state, crtc, old_crtc_state, new_crtc_state, i) { new_crtc_state 7351 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c new_crtc_state, new_crtc_state 7359 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c for_each_oldnew_crtc_in_state(state, crtc, old_crtc_state, new_crtc_state, i) { new_crtc_state 7362 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c new_crtc_state, new_crtc_state 7483 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c for_each_new_crtc_in_state (state, crtc, new_crtc_state, i) { new_crtc_state 7485 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c to_dm_crtc_state(new_crtc_state); new_crtc_state 1447 drivers/gpu/drm/bridge/analogix/analogix_dp_core.c struct drm_crtc_state *new_crtc_state = NULL; new_crtc_state 1453 drivers/gpu/drm/bridge/analogix/analogix_dp_core.c new_crtc_state = drm_atomic_get_new_crtc_state(state, crtc); new_crtc_state 1454 drivers/gpu/drm/bridge/analogix/analogix_dp_core.c if (!new_crtc_state) new_crtc_state 1458 drivers/gpu/drm/bridge/analogix/analogix_dp_core.c if (new_crtc_state->self_refresh_active) new_crtc_state 1471 drivers/gpu/drm/bridge/analogix/analogix_dp_core.c struct drm_crtc_state *new_crtc_state; new_crtc_state 1478 drivers/gpu/drm/bridge/analogix/analogix_dp_core.c new_crtc_state = drm_atomic_get_new_crtc_state(state, crtc); new_crtc_state 1479 drivers/gpu/drm/bridge/analogix/analogix_dp_core.c if (!new_crtc_state || !new_crtc_state->self_refresh_active) new_crtc_state 324 drivers/gpu/drm/drm_atomic.c const struct drm_crtc_state *new_crtc_state) new_crtc_state 326 drivers/gpu/drm/drm_atomic.c struct drm_crtc *crtc = new_crtc_state->crtc; new_crtc_state 336 drivers/gpu/drm/drm_atomic.c if (new_crtc_state->active && !new_crtc_state->enable) { new_crtc_state 346 drivers/gpu/drm/drm_atomic.c WARN_ON(new_crtc_state->enable && !new_crtc_state->mode_blob)) { new_crtc_state 353 drivers/gpu/drm/drm_atomic.c WARN_ON(!new_crtc_state->enable && new_crtc_state->mode_blob)) { new_crtc_state 369 drivers/gpu/drm/drm_atomic.c if (new_crtc_state->event && new_crtc_state 370 drivers/gpu/drm/drm_atomic.c !new_crtc_state->active && !old_crtc_state->active) { new_crtc_state 1142 drivers/gpu/drm/drm_atomic.c struct drm_crtc_state *new_crtc_state; new_crtc_state 1158 drivers/gpu/drm/drm_atomic.c for_each_oldnew_crtc_in_state(state, crtc, old_crtc_state, new_crtc_state, i) { new_crtc_state 1159 drivers/gpu/drm/drm_atomic.c ret = drm_atomic_crtc_check(old_crtc_state, new_crtc_state); new_crtc_state 1187 drivers/gpu/drm/drm_atomic.c for_each_new_crtc_in_state(state, crtc, new_crtc_state, i) { new_crtc_state 1188 drivers/gpu/drm/drm_atomic.c if (drm_atomic_crtc_needs_modeset(new_crtc_state)) { new_crtc_state 1287 drivers/gpu/drm/drm_atomic.c struct drm_crtc_state *new_crtc_state; new_crtc_state 1327 drivers/gpu/drm/drm_atomic.c for_each_new_crtc_in_state(state, crtc, new_crtc_state, i) { new_crtc_state 1337 drivers/gpu/drm/drm_atomic.c if (!new_crtc_state->connector_mask) { new_crtc_state 1338 drivers/gpu/drm/drm_atomic.c ret = drm_atomic_set_mode_prop_for_crtc(new_crtc_state, new_crtc_state 1343 drivers/gpu/drm/drm_atomic.c new_crtc_state->active = false; new_crtc_state 415 drivers/gpu/drm/drm_atomic_helper.c struct drm_crtc_state *new_crtc_state; new_crtc_state 421 drivers/gpu/drm/drm_atomic_helper.c for_each_new_crtc_in_state(state, crtc, new_crtc_state, i) { new_crtc_state 422 drivers/gpu/drm/drm_atomic_helper.c if (!new_crtc_state->mode_changed && new_crtc_state 423 drivers/gpu/drm/drm_atomic_helper.c !new_crtc_state->connectors_changed) new_crtc_state 426 drivers/gpu/drm/drm_atomic_helper.c drm_mode_copy(&new_crtc_state->adjusted_mode, &new_crtc_state->mode); new_crtc_state 438 drivers/gpu/drm/drm_atomic_helper.c new_crtc_state = new_crtc_state 448 drivers/gpu/drm/drm_atomic_helper.c ret = drm_bridge_mode_fixup(encoder->bridge, &new_crtc_state->mode, new_crtc_state 449 drivers/gpu/drm/drm_atomic_helper.c &new_crtc_state->adjusted_mode); new_crtc_state 456 drivers/gpu/drm/drm_atomic_helper.c ret = funcs->atomic_check(encoder, new_crtc_state, new_crtc_state 464 drivers/gpu/drm/drm_atomic_helper.c ret = funcs->mode_fixup(encoder, &new_crtc_state->mode, new_crtc_state 465 drivers/gpu/drm/drm_atomic_helper.c &new_crtc_state->adjusted_mode); new_crtc_state 474 drivers/gpu/drm/drm_atomic_helper.c for_each_new_crtc_in_state(state, crtc, new_crtc_state, i) { new_crtc_state 477 drivers/gpu/drm/drm_atomic_helper.c if (!new_crtc_state->enable) new_crtc_state 480 drivers/gpu/drm/drm_atomic_helper.c if (!new_crtc_state->mode_changed && new_crtc_state 481 drivers/gpu/drm/drm_atomic_helper.c !new_crtc_state->connectors_changed) new_crtc_state 488 drivers/gpu/drm/drm_atomic_helper.c ret = funcs->mode_fixup(crtc, &new_crtc_state->mode, new_crtc_state 489 drivers/gpu/drm/drm_atomic_helper.c &new_crtc_state->adjusted_mode); new_crtc_state 611 drivers/gpu/drm/drm_atomic_helper.c struct drm_crtc_state *old_crtc_state, *new_crtc_state; new_crtc_state 617 drivers/gpu/drm/drm_atomic_helper.c for_each_oldnew_crtc_in_state(state, crtc, old_crtc_state, new_crtc_state, i) { new_crtc_state 619 drivers/gpu/drm/drm_atomic_helper.c !!new_crtc_state->connector_mask; new_crtc_state 623 drivers/gpu/drm/drm_atomic_helper.c if (!drm_mode_equal(&old_crtc_state->mode, &new_crtc_state->mode)) { new_crtc_state 626 drivers/gpu/drm/drm_atomic_helper.c new_crtc_state->mode_changed = true; new_crtc_state 629 drivers/gpu/drm/drm_atomic_helper.c if (old_crtc_state->enable != new_crtc_state->enable) { new_crtc_state 641 drivers/gpu/drm/drm_atomic_helper.c new_crtc_state->mode_changed = true; new_crtc_state 642 drivers/gpu/drm/drm_atomic_helper.c new_crtc_state->connectors_changed = true; new_crtc_state 645 drivers/gpu/drm/drm_atomic_helper.c if (old_crtc_state->active != new_crtc_state->active) { new_crtc_state 648 drivers/gpu/drm/drm_atomic_helper.c new_crtc_state->active_changed = true; new_crtc_state 651 drivers/gpu/drm/drm_atomic_helper.c if (new_crtc_state->enable != has_connectors) { new_crtc_state 679 drivers/gpu/drm/drm_atomic_helper.c new_crtc_state = drm_atomic_get_new_crtc_state(state, new_crtc_state 683 drivers/gpu/drm/drm_atomic_helper.c new_crtc_state->connectors_changed = true; new_crtc_state 687 drivers/gpu/drm/drm_atomic_helper.c new_crtc_state->connectors_changed = true; new_crtc_state 704 drivers/gpu/drm/drm_atomic_helper.c for_each_oldnew_crtc_in_state(state, crtc, old_crtc_state, new_crtc_state, i) { new_crtc_state 705 drivers/gpu/drm/drm_atomic_helper.c if (!drm_atomic_crtc_needs_modeset(new_crtc_state)) new_crtc_state 710 drivers/gpu/drm/drm_atomic_helper.c new_crtc_state->enable ? 'y' : 'n', new_crtc_state 711 drivers/gpu/drm/drm_atomic_helper.c new_crtc_state->active ? 'y' : 'n'); new_crtc_state 863 drivers/gpu/drm/drm_atomic_helper.c struct drm_crtc_state *new_crtc_state; new_crtc_state 890 drivers/gpu/drm/drm_atomic_helper.c for_each_new_crtc_in_state(state, crtc, new_crtc_state, i) { new_crtc_state 898 drivers/gpu/drm/drm_atomic_helper.c ret = funcs->atomic_check(crtc, new_crtc_state); new_crtc_state 991 drivers/gpu/drm/drm_atomic_helper.c struct drm_crtc_state *old_crtc_state, *new_crtc_state; new_crtc_state 1006 drivers/gpu/drm/drm_atomic_helper.c new_crtc_state = drm_atomic_get_new_crtc_state( new_crtc_state 1010 drivers/gpu/drm/drm_atomic_helper.c new_crtc_state = NULL; new_crtc_state 1012 drivers/gpu/drm/drm_atomic_helper.c if (!crtc_needs_disable(old_crtc_state, new_crtc_state) || new_crtc_state 1050 drivers/gpu/drm/drm_atomic_helper.c for_each_oldnew_crtc_in_state(old_state, crtc, old_crtc_state, new_crtc_state, i) { new_crtc_state 1055 drivers/gpu/drm/drm_atomic_helper.c if (!drm_atomic_crtc_needs_modeset(new_crtc_state)) new_crtc_state 1058 drivers/gpu/drm/drm_atomic_helper.c if (!crtc_needs_disable(old_crtc_state, new_crtc_state)) new_crtc_state 1068 drivers/gpu/drm/drm_atomic_helper.c if (new_crtc_state->enable && funcs->prepare) new_crtc_state 1113 drivers/gpu/drm/drm_atomic_helper.c struct drm_crtc_state *new_crtc_state; new_crtc_state 1150 drivers/gpu/drm/drm_atomic_helper.c for_each_new_crtc_in_state(old_state, crtc, new_crtc_state, i) { new_crtc_state 1154 drivers/gpu/drm/drm_atomic_helper.c crtc->mode = new_crtc_state->mode; new_crtc_state 1155 drivers/gpu/drm/drm_atomic_helper.c crtc->enabled = new_crtc_state->enable; new_crtc_state 1165 drivers/gpu/drm/drm_atomic_helper.c if (new_crtc_state->enable) new_crtc_state 1167 drivers/gpu/drm/drm_atomic_helper.c &new_crtc_state->adjusted_mode); new_crtc_state 1176 drivers/gpu/drm/drm_atomic_helper.c struct drm_crtc_state *new_crtc_state; new_crtc_state 1181 drivers/gpu/drm/drm_atomic_helper.c for_each_new_crtc_in_state(old_state, crtc, new_crtc_state, i) { new_crtc_state 1184 drivers/gpu/drm/drm_atomic_helper.c if (!new_crtc_state->mode_changed) new_crtc_state 1189 drivers/gpu/drm/drm_atomic_helper.c if (new_crtc_state->enable && funcs->mode_set_nofb) { new_crtc_state 1207 drivers/gpu/drm/drm_atomic_helper.c new_crtc_state = new_conn_state->crtc->state; new_crtc_state 1208 drivers/gpu/drm/drm_atomic_helper.c mode = &new_crtc_state->mode; new_crtc_state 1209 drivers/gpu/drm/drm_atomic_helper.c adjusted_mode = &new_crtc_state->adjusted_mode; new_crtc_state 1211 drivers/gpu/drm/drm_atomic_helper.c if (!new_crtc_state->mode_changed) new_crtc_state 1222 drivers/gpu/drm/drm_atomic_helper.c funcs->atomic_mode_set(encoder, new_crtc_state, new_crtc_state 1297 drivers/gpu/drm/drm_atomic_helper.c struct drm_crtc_state *new_crtc_state; new_crtc_state 1302 drivers/gpu/drm/drm_atomic_helper.c for_each_oldnew_crtc_in_state(old_state, crtc, old_crtc_state, new_crtc_state, i) { new_crtc_state 1306 drivers/gpu/drm/drm_atomic_helper.c if (!drm_atomic_crtc_needs_modeset(new_crtc_state)) new_crtc_state 1309 drivers/gpu/drm/drm_atomic_helper.c if (!new_crtc_state->active) new_crtc_state 1314 drivers/gpu/drm/drm_atomic_helper.c if (new_crtc_state->enable) { new_crtc_state 1435 drivers/gpu/drm/drm_atomic_helper.c struct drm_crtc_state *old_crtc_state, *new_crtc_state; new_crtc_state 1446 drivers/gpu/drm/drm_atomic_helper.c for_each_oldnew_crtc_in_state(old_state, crtc, old_crtc_state, new_crtc_state, i) { new_crtc_state 1447 drivers/gpu/drm/drm_atomic_helper.c if (!new_crtc_state->active) new_crtc_state 1584 drivers/gpu/drm/drm_atomic_helper.c struct drm_crtc_state *new_crtc_state; new_crtc_state 1613 drivers/gpu/drm/drm_atomic_helper.c for_each_new_crtc_in_state(old_state, crtc, new_crtc_state, i) new_crtc_state 1614 drivers/gpu/drm/drm_atomic_helper.c if (new_crtc_state->self_refresh_active) new_crtc_state 1952 drivers/gpu/drm/drm_atomic_helper.c struct drm_crtc_state *new_crtc_state; new_crtc_state 1954 drivers/gpu/drm/drm_atomic_helper.c new_crtc_state = drm_atomic_get_new_crtc_state(state, crtc); new_crtc_state 1956 drivers/gpu/drm/drm_atomic_helper.c return new_crtc_state->commit; new_crtc_state 2017 drivers/gpu/drm/drm_atomic_helper.c struct drm_crtc_state *old_crtc_state, *new_crtc_state; new_crtc_state 2025 drivers/gpu/drm/drm_atomic_helper.c for_each_oldnew_crtc_in_state(state, crtc, old_crtc_state, new_crtc_state, i) { new_crtc_state 2032 drivers/gpu/drm/drm_atomic_helper.c new_crtc_state->commit = commit; new_crtc_state 2041 drivers/gpu/drm/drm_atomic_helper.c if (!old_crtc_state->active && !new_crtc_state->active) { new_crtc_state 2052 drivers/gpu/drm/drm_atomic_helper.c if (!new_crtc_state->event) { new_crtc_state 2058 drivers/gpu/drm/drm_atomic_helper.c new_crtc_state->event = commit->event; new_crtc_state 2061 drivers/gpu/drm/drm_atomic_helper.c new_crtc_state->event->base.completion = &commit->flip_done; new_crtc_state 2062 drivers/gpu/drm/drm_atomic_helper.c new_crtc_state->event->base.completion_release = release_crtc_commit; new_crtc_state 2212 drivers/gpu/drm/drm_atomic_helper.c struct drm_crtc_state *new_crtc_state; new_crtc_state 2216 drivers/gpu/drm/drm_atomic_helper.c for_each_new_crtc_in_state(old_state, crtc, new_crtc_state, i) { new_crtc_state 2219 drivers/gpu/drm/drm_atomic_helper.c if (!new_crtc_state->no_vblank) new_crtc_state 2223 drivers/gpu/drm/drm_atomic_helper.c if (new_crtc_state->event) { new_crtc_state 2225 drivers/gpu/drm/drm_atomic_helper.c new_crtc_state->event); new_crtc_state 2226 drivers/gpu/drm/drm_atomic_helper.c new_crtc_state->event = NULL; new_crtc_state 2251 drivers/gpu/drm/drm_atomic_helper.c struct drm_crtc_state *old_crtc_state, *new_crtc_state; new_crtc_state 2255 drivers/gpu/drm/drm_atomic_helper.c for_each_oldnew_crtc_in_state(old_state, crtc, old_crtc_state, new_crtc_state, i) { new_crtc_state 2256 drivers/gpu/drm/drm_atomic_helper.c commit = new_crtc_state->commit; new_crtc_state 2271 drivers/gpu/drm/drm_atomic_helper.c WARN_ON(new_crtc_state->event); new_crtc_state 2433 drivers/gpu/drm/drm_atomic_helper.c struct drm_crtc_state *old_crtc_state, *new_crtc_state; new_crtc_state 2440 drivers/gpu/drm/drm_atomic_helper.c for_each_oldnew_crtc_in_state(old_state, crtc, old_crtc_state, new_crtc_state, i) { new_crtc_state 2448 drivers/gpu/drm/drm_atomic_helper.c if (active_only && !new_crtc_state->active) new_crtc_state 2498 drivers/gpu/drm/drm_atomic_helper.c for_each_oldnew_crtc_in_state(old_state, crtc, old_crtc_state, new_crtc_state, i) { new_crtc_state 2506 drivers/gpu/drm/drm_atomic_helper.c if (active_only && !new_crtc_state->active) new_crtc_state 2537 drivers/gpu/drm/drm_atomic_helper.c struct drm_crtc_state *new_crtc_state = new_crtc_state 2543 drivers/gpu/drm/drm_atomic_helper.c plane_mask |= new_crtc_state->plane_mask; new_crtc_state 2704 drivers/gpu/drm/drm_atomic_helper.c struct drm_crtc_state *old_crtc_state, *new_crtc_state; new_crtc_state 2765 drivers/gpu/drm/drm_atomic_helper.c for_each_oldnew_crtc_in_state(state, crtc, old_crtc_state, new_crtc_state, i) { new_crtc_state 2769 drivers/gpu/drm/drm_atomic_helper.c new_crtc_state->state = NULL; new_crtc_state 2772 drivers/gpu/drm/drm_atomic_helper.c crtc->state = new_crtc_state; new_crtc_state 2774 drivers/gpu/drm/drm_atomic_helper.c if (new_crtc_state->commit) { new_crtc_state 2776 drivers/gpu/drm/drm_atomic_helper.c list_add(&new_crtc_state->commit->commit_entry, new_crtc_state 2780 drivers/gpu/drm/drm_atomic_helper.c new_crtc_state->commit->event = NULL; new_crtc_state 3239 drivers/gpu/drm/drm_atomic_helper.c struct drm_crtc_state *new_crtc_state; new_crtc_state 3246 drivers/gpu/drm/drm_atomic_helper.c for_each_new_crtc_in_state(state, crtc, new_crtc_state, i) new_crtc_state 495 drivers/gpu/drm/drm_blend.c struct drm_crtc_state *old_crtc_state, *new_crtc_state; new_crtc_state 505 drivers/gpu/drm/drm_blend.c new_crtc_state = drm_atomic_get_new_crtc_state(state, crtc); new_crtc_state 506 drivers/gpu/drm/drm_blend.c new_crtc_state->zpos_changed = true; new_crtc_state 510 drivers/gpu/drm/drm_blend.c for_each_oldnew_crtc_in_state(state, crtc, old_crtc_state, new_crtc_state, i) { new_crtc_state 511 drivers/gpu/drm/drm_blend.c if (old_crtc_state->plane_mask != new_crtc_state->plane_mask || new_crtc_state 512 drivers/gpu/drm/drm_blend.c new_crtc_state->zpos_changed) { new_crtc_state 514 drivers/gpu/drm/drm_blend.c new_crtc_state); new_crtc_state 142 drivers/gpu/drm/i915/display/intel_atomic_plane.c struct intel_crtc_state *new_crtc_state, new_crtc_state 149 drivers/gpu/drm/i915/display/intel_atomic_plane.c new_crtc_state->active_planes &= ~BIT(plane->id); new_crtc_state 150 drivers/gpu/drm/i915/display/intel_atomic_plane.c new_crtc_state->nv12_planes &= ~BIT(plane->id); new_crtc_state 151 drivers/gpu/drm/i915/display/intel_atomic_plane.c new_crtc_state->c8_planes &= ~BIT(plane->id); new_crtc_state 152 drivers/gpu/drm/i915/display/intel_atomic_plane.c new_crtc_state->data_rate[plane->id] = 0; new_crtc_state 158 drivers/gpu/drm/i915/display/intel_atomic_plane.c ret = plane->check_plane(new_crtc_state, new_plane_state); new_crtc_state 164 drivers/gpu/drm/i915/display/intel_atomic_plane.c new_crtc_state->active_planes |= BIT(plane->id); new_crtc_state 168 drivers/gpu/drm/i915/display/intel_atomic_plane.c new_crtc_state->nv12_planes |= BIT(plane->id); new_crtc_state 172 drivers/gpu/drm/i915/display/intel_atomic_plane.c new_crtc_state->c8_planes |= BIT(plane->id); new_crtc_state 175 drivers/gpu/drm/i915/display/intel_atomic_plane.c new_crtc_state->update_planes |= BIT(plane->id); new_crtc_state 177 drivers/gpu/drm/i915/display/intel_atomic_plane.c new_crtc_state->data_rate[plane->id] = new_crtc_state 178 drivers/gpu/drm/i915/display/intel_atomic_plane.c intel_plane_data_rate(new_crtc_state, new_plane_state); new_crtc_state 180 drivers/gpu/drm/i915/display/intel_atomic_plane.c return intel_plane_atomic_calc_changes(old_crtc_state, new_crtc_state, new_crtc_state 210 drivers/gpu/drm/i915/display/intel_atomic_plane.c struct intel_crtc_state *new_crtc_state; new_crtc_state 217 drivers/gpu/drm/i915/display/intel_atomic_plane.c new_crtc_state = intel_atomic_get_new_crtc_state(state, crtc); new_crtc_state 220 drivers/gpu/drm/i915/display/intel_atomic_plane.c new_crtc_state, new_crtc_state 303 drivers/gpu/drm/i915/display/intel_atomic_plane.c struct intel_crtc_state *new_crtc_state = new_crtc_state 307 drivers/gpu/drm/i915/display/intel_atomic_plane.c u32 update_mask = new_crtc_state->update_planes; new_crtc_state 322 drivers/gpu/drm/i915/display/intel_atomic_plane.c intel_update_plane(plane, new_crtc_state, new_plane_state); new_crtc_state 339 drivers/gpu/drm/i915/display/intel_atomic_plane.c intel_update_slave(plane, new_crtc_state, new_plane_state); new_crtc_state 341 drivers/gpu/drm/i915/display/intel_atomic_plane.c intel_disable_plane(plane, new_crtc_state); new_crtc_state 349 drivers/gpu/drm/i915/display/intel_atomic_plane.c struct intel_crtc_state *new_crtc_state = new_crtc_state 351 drivers/gpu/drm/i915/display/intel_atomic_plane.c u32 update_mask = new_crtc_state->update_planes; new_crtc_state 362 drivers/gpu/drm/i915/display/intel_atomic_plane.c intel_update_plane(plane, new_crtc_state, new_plane_state); new_crtc_state 364 drivers/gpu/drm/i915/display/intel_atomic_plane.c intel_disable_plane(plane, new_crtc_state); new_crtc_state 342 drivers/gpu/drm/i915/display/intel_bw.c struct intel_crtc_state *new_crtc_state, *old_crtc_state; new_crtc_state 354 drivers/gpu/drm/i915/display/intel_bw.c new_crtc_state, i) { new_crtc_state 358 drivers/gpu/drm/i915/display/intel_bw.c intel_bw_crtc_data_rate(new_crtc_state); new_crtc_state 362 drivers/gpu/drm/i915/display/intel_bw.c intel_bw_crtc_num_active_planes(new_crtc_state); new_crtc_state 993 drivers/gpu/drm/i915/display/intel_color.c static bool intel_can_preload_luts(const struct intel_crtc_state *new_crtc_state) new_crtc_state 995 drivers/gpu/drm/i915/display/intel_color.c struct intel_crtc *crtc = to_intel_crtc(new_crtc_state->base.crtc); new_crtc_state 997 drivers/gpu/drm/i915/display/intel_color.c to_intel_atomic_state(new_crtc_state->base.state); new_crtc_state 1005 drivers/gpu/drm/i915/display/intel_color.c static bool chv_can_preload_luts(const struct intel_crtc_state *new_crtc_state) new_crtc_state 1007 drivers/gpu/drm/i915/display/intel_color.c struct intel_crtc *crtc = to_intel_crtc(new_crtc_state->base.crtc); new_crtc_state 1009 drivers/gpu/drm/i915/display/intel_color.c to_intel_atomic_state(new_crtc_state->base.state); new_crtc_state 1018 drivers/gpu/drm/i915/display/intel_color.c if (old_crtc_state->cgm_mode || new_crtc_state->cgm_mode) new_crtc_state 1024 drivers/gpu/drm/i915/display/intel_color.c static bool glk_can_preload_luts(const struct intel_crtc_state *new_crtc_state) new_crtc_state 1026 drivers/gpu/drm/i915/display/intel_color.c struct intel_crtc *crtc = to_intel_crtc(new_crtc_state->base.crtc); new_crtc_state 1028 drivers/gpu/drm/i915/display/intel_color.c to_intel_atomic_state(new_crtc_state->base.state); new_crtc_state 1073 drivers/gpu/drm/i915/display/intel_color.c intel_color_add_affected_planes(struct intel_crtc_state *new_crtc_state) new_crtc_state 1075 drivers/gpu/drm/i915/display/intel_color.c struct intel_crtc *crtc = to_intel_crtc(new_crtc_state->base.crtc); new_crtc_state 1078 drivers/gpu/drm/i915/display/intel_color.c to_intel_atomic_state(new_crtc_state->base.state); new_crtc_state 1083 drivers/gpu/drm/i915/display/intel_color.c if (!new_crtc_state->base.active || new_crtc_state 1084 drivers/gpu/drm/i915/display/intel_color.c drm_atomic_crtc_needs_modeset(&new_crtc_state->base)) new_crtc_state 1087 drivers/gpu/drm/i915/display/intel_color.c if (new_crtc_state->gamma_enable == old_crtc_state->gamma_enable && new_crtc_state 1088 drivers/gpu/drm/i915/display/intel_color.c new_crtc_state->csc_enable == old_crtc_state->csc_enable) new_crtc_state 1094 drivers/gpu/drm/i915/display/intel_color.c if (!need_plane_update(plane, new_crtc_state)) new_crtc_state 1101 drivers/gpu/drm/i915/display/intel_color.c new_crtc_state->update_planes |= BIT(plane->id); new_crtc_state 1793 drivers/gpu/drm/i915/display/intel_display.c static void intel_enable_pipe(const struct intel_crtc_state *new_crtc_state) new_crtc_state 1795 drivers/gpu/drm/i915/display/intel_display.c struct intel_crtc *crtc = to_intel_crtc(new_crtc_state->base.crtc); new_crtc_state 1797 drivers/gpu/drm/i915/display/intel_display.c enum transcoder cpu_transcoder = new_crtc_state->cpu_transcoder; new_crtc_state 1812 drivers/gpu/drm/i915/display/intel_display.c if (intel_crtc_has_type(new_crtc_state, INTEL_OUTPUT_DSI)) new_crtc_state 1817 drivers/gpu/drm/i915/display/intel_display.c if (new_crtc_state->has_pch_encoder) { new_crtc_state 1847 drivers/gpu/drm/i915/display/intel_display.c if (intel_crtc_max_vblank_count(new_crtc_state) == 0) new_crtc_state 4398 drivers/gpu/drm/i915/display/intel_display.c const struct intel_crtc_state *new_crtc_state) new_crtc_state 4400 drivers/gpu/drm/i915/display/intel_display.c struct intel_crtc *crtc = to_intel_crtc(new_crtc_state->base.crtc); new_crtc_state 4404 drivers/gpu/drm/i915/display/intel_display.c crtc->base.mode = new_crtc_state->base.mode; new_crtc_state 4416 drivers/gpu/drm/i915/display/intel_display.c ((new_crtc_state->pipe_src_w - 1) << 16) | new_crtc_state 4417 drivers/gpu/drm/i915/display/intel_display.c (new_crtc_state->pipe_src_h - 1)); new_crtc_state 4421 drivers/gpu/drm/i915/display/intel_display.c skl_detach_scalers(new_crtc_state); new_crtc_state 4423 drivers/gpu/drm/i915/display/intel_display.c if (new_crtc_state->pch_pfit.enabled) new_crtc_state 4424 drivers/gpu/drm/i915/display/intel_display.c skylake_pfit_enable(new_crtc_state); new_crtc_state 4426 drivers/gpu/drm/i915/display/intel_display.c if (new_crtc_state->pch_pfit.enabled) new_crtc_state 4427 drivers/gpu/drm/i915/display/intel_display.c ironlake_pfit_enable(new_crtc_state); new_crtc_state 5760 drivers/gpu/drm/i915/display/intel_display.c const struct intel_crtc_state *new_crtc_state) new_crtc_state 5815 drivers/gpu/drm/i915/display/intel_display.c const struct intel_crtc_state *new_crtc_state) new_crtc_state 5817 drivers/gpu/drm/i915/display/intel_display.c struct intel_crtc *crtc = to_intel_crtc(new_crtc_state->base.crtc); new_crtc_state 5823 drivers/gpu/drm/i915/display/intel_display.c if (needs_modeset(new_crtc_state)) new_crtc_state 5833 drivers/gpu/drm/i915/display/intel_display.c (new_crtc_state->base.color_mgmt_changed || new_crtc_state 5834 drivers/gpu/drm/i915/display/intel_display.c new_crtc_state->update_pipe) && new_crtc_state 5835 drivers/gpu/drm/i915/display/intel_display.c new_crtc_state->gamma_mode == GAMMA_MODE_MODE_SPLIT) new_crtc_state 5838 drivers/gpu/drm/i915/display/intel_display.c return !new_crtc_state->ips_enabled; new_crtc_state 5842 drivers/gpu/drm/i915/display/intel_display.c const struct intel_crtc_state *new_crtc_state) new_crtc_state 5844 drivers/gpu/drm/i915/display/intel_display.c struct intel_crtc *crtc = to_intel_crtc(new_crtc_state->base.crtc); new_crtc_state 5847 drivers/gpu/drm/i915/display/intel_display.c if (!new_crtc_state->ips_enabled) new_crtc_state 5850 drivers/gpu/drm/i915/display/intel_display.c if (needs_modeset(new_crtc_state)) new_crtc_state 5860 drivers/gpu/drm/i915/display/intel_display.c (new_crtc_state->base.color_mgmt_changed || new_crtc_state 5861 drivers/gpu/drm/i915/display/intel_display.c new_crtc_state->update_pipe) && new_crtc_state 5862 drivers/gpu/drm/i915/display/intel_display.c new_crtc_state->gamma_mode == GAMMA_MODE_MODE_SPLIT) new_crtc_state 5869 drivers/gpu/drm/i915/display/intel_display.c if (new_crtc_state->update_pipe && new_crtc_state 6039 drivers/gpu/drm/i915/display/intel_display.c const struct intel_crtc_state *new_crtc_state = new_crtc_state 6041 drivers/gpu/drm/i915/display/intel_display.c unsigned int update_mask = new_crtc_state->update_planes; new_crtc_state 6054 drivers/gpu/drm/i915/display/intel_display.c intel_disable_plane(plane, new_crtc_state); new_crtc_state 11756 drivers/gpu/drm/i915/display/intel_display.c static bool c8_planes_changed(const struct intel_crtc_state *new_crtc_state) new_crtc_state 11758 drivers/gpu/drm/i915/display/intel_display.c struct intel_crtc *crtc = to_intel_crtc(new_crtc_state->base.crtc); new_crtc_state 11760 drivers/gpu/drm/i915/display/intel_display.c to_intel_atomic_state(new_crtc_state->base.state); new_crtc_state 11764 drivers/gpu/drm/i915/display/intel_display.c return !old_crtc_state->c8_planes != !new_crtc_state->c8_planes; new_crtc_state 12876 drivers/gpu/drm/i915/display/intel_display.c struct intel_crtc_state *new_crtc_state) new_crtc_state 12891 drivers/gpu/drm/i915/display/intel_display.c if (INTEL_GEN(dev_priv) < 9 || !new_crtc_state->base.active) new_crtc_state 12899 drivers/gpu/drm/i915/display/intel_display.c sw_wm = &new_crtc_state->wm.skl.optimal; new_crtc_state 12949 drivers/gpu/drm/i915/display/intel_display.c sw_ddb_entry = &new_crtc_state->wm.skl.plane_ddb_y[plane]; new_crtc_state 13001 drivers/gpu/drm/i915/display/intel_display.c sw_ddb_entry = &new_crtc_state->wm.skl.plane_ddb_y[PLANE_CURSOR]; new_crtc_state 13091 drivers/gpu/drm/i915/display/intel_display.c struct intel_crtc_state *new_crtc_state) new_crtc_state 13113 drivers/gpu/drm/i915/display/intel_display.c active = new_crtc_state->base.active; new_crtc_state 13115 drivers/gpu/drm/i915/display/intel_display.c I915_STATE_WARN(new_crtc_state->base.active != active, new_crtc_state 13117 drivers/gpu/drm/i915/display/intel_display.c "(expected %i, found %i)\n", new_crtc_state->base.active, active); new_crtc_state 13119 drivers/gpu/drm/i915/display/intel_display.c I915_STATE_WARN(crtc->active != new_crtc_state->base.active, new_crtc_state 13121 drivers/gpu/drm/i915/display/intel_display.c "(expected %i, found %i)\n", new_crtc_state->base.active, crtc->active); new_crtc_state 13127 drivers/gpu/drm/i915/display/intel_display.c I915_STATE_WARN(active != new_crtc_state->base.active, new_crtc_state 13129 drivers/gpu/drm/i915/display/intel_display.c encoder->base.base.id, active, new_crtc_state->base.active); new_crtc_state 13141 drivers/gpu/drm/i915/display/intel_display.c if (!new_crtc_state->base.active) new_crtc_state 13146 drivers/gpu/drm/i915/display/intel_display.c if (!intel_pipe_config_compare(new_crtc_state, new_crtc_state 13150 drivers/gpu/drm/i915/display/intel_display.c intel_dump_pipe_config(new_crtc_state, NULL, "[sw state]"); new_crtc_state 13171 drivers/gpu/drm/i915/display/intel_display.c struct intel_crtc_state *new_crtc_state) new_crtc_state 13203 drivers/gpu/drm/i915/display/intel_display.c if (new_crtc_state->base.active) new_crtc_state 13225 drivers/gpu/drm/i915/display/intel_display.c struct intel_crtc_state *new_crtc_state) new_crtc_state 13229 drivers/gpu/drm/i915/display/intel_display.c if (new_crtc_state->shared_dpll) new_crtc_state 13230 drivers/gpu/drm/i915/display/intel_display.c verify_single_dpll_state(dev_priv, new_crtc_state->shared_dpll, crtc, new_crtc_state); new_crtc_state 13233 drivers/gpu/drm/i915/display/intel_display.c old_crtc_state->shared_dpll != new_crtc_state->shared_dpll) { new_crtc_state 13250 drivers/gpu/drm/i915/display/intel_display.c struct intel_crtc_state *new_crtc_state) new_crtc_state 13252 drivers/gpu/drm/i915/display/intel_display.c if (!needs_modeset(new_crtc_state) && !new_crtc_state->update_pipe) new_crtc_state 13255 drivers/gpu/drm/i915/display/intel_display.c verify_wm_state(crtc, new_crtc_state); new_crtc_state 13257 drivers/gpu/drm/i915/display/intel_display.c verify_crtc_state(crtc, old_crtc_state, new_crtc_state); new_crtc_state 13258 drivers/gpu/drm/i915/display/intel_display.c verify_shared_dpll_state(crtc, old_crtc_state, new_crtc_state); new_crtc_state 13330 drivers/gpu/drm/i915/display/intel_display.c struct intel_crtc_state *new_crtc_state; new_crtc_state 13337 drivers/gpu/drm/i915/display/intel_display.c for_each_new_intel_crtc_in_state(state, crtc, new_crtc_state, i) { new_crtc_state 13338 drivers/gpu/drm/i915/display/intel_display.c if (!needs_modeset(new_crtc_state)) new_crtc_state 13462 drivers/gpu/drm/i915/display/intel_display.c struct intel_crtc_state *old_crtc_state, *new_crtc_state; new_crtc_state 13482 drivers/gpu/drm/i915/display/intel_display.c new_crtc_state, i) { new_crtc_state 13483 drivers/gpu/drm/i915/display/intel_display.c if (new_crtc_state->base.active) new_crtc_state 13488 drivers/gpu/drm/i915/display/intel_display.c if (old_crtc_state->base.active != new_crtc_state->base.active) new_crtc_state 13584 drivers/gpu/drm/i915/display/intel_display.c struct intel_crtc_state *new_crtc_state) new_crtc_state 13586 drivers/gpu/drm/i915/display/intel_display.c if (!intel_pipe_config_compare(old_crtc_state, new_crtc_state, true)) new_crtc_state 13589 drivers/gpu/drm/i915/display/intel_display.c new_crtc_state->base.mode_changed = false; new_crtc_state 13590 drivers/gpu/drm/i915/display/intel_display.c new_crtc_state->update_pipe = true; new_crtc_state 13600 drivers/gpu/drm/i915/display/intel_display.c new_crtc_state->fdi_m_n = old_crtc_state->fdi_m_n; new_crtc_state 13601 drivers/gpu/drm/i915/display/intel_display.c new_crtc_state->dp_m_n = old_crtc_state->dp_m_n; new_crtc_state 13602 drivers/gpu/drm/i915/display/intel_display.c new_crtc_state->dp_m2_n2 = old_crtc_state->dp_m2_n2; new_crtc_state 13603 drivers/gpu/drm/i915/display/intel_display.c new_crtc_state->has_drrs = old_crtc_state->has_drrs; new_crtc_state 13616 drivers/gpu/drm/i915/display/intel_display.c struct intel_crtc_state *old_crtc_state, *new_crtc_state; new_crtc_state 13623 drivers/gpu/drm/i915/display/intel_display.c new_crtc_state, i) { new_crtc_state 13624 drivers/gpu/drm/i915/display/intel_display.c if (new_crtc_state->base.mode.private_flags != new_crtc_state 13626 drivers/gpu/drm/i915/display/intel_display.c new_crtc_state->base.mode_changed = true; new_crtc_state 13634 drivers/gpu/drm/i915/display/intel_display.c new_crtc_state, i) { new_crtc_state 13635 drivers/gpu/drm/i915/display/intel_display.c if (!needs_modeset(new_crtc_state)) new_crtc_state 13638 drivers/gpu/drm/i915/display/intel_display.c if (!new_crtc_state->base.enable) { new_crtc_state 13643 drivers/gpu/drm/i915/display/intel_display.c ret = intel_modeset_pipe_config(new_crtc_state); new_crtc_state 13647 drivers/gpu/drm/i915/display/intel_display.c intel_crtc_check_fastset(old_crtc_state, new_crtc_state); new_crtc_state 13649 drivers/gpu/drm/i915/display/intel_display.c if (needs_modeset(new_crtc_state)) new_crtc_state 13683 drivers/gpu/drm/i915/display/intel_display.c new_crtc_state, i) { new_crtc_state 13684 drivers/gpu/drm/i915/display/intel_display.c if (!needs_modeset(new_crtc_state) && new_crtc_state 13685 drivers/gpu/drm/i915/display/intel_display.c !new_crtc_state->update_pipe) new_crtc_state 13688 drivers/gpu/drm/i915/display/intel_display.c intel_dump_pipe_config(new_crtc_state, state, new_crtc_state 13689 drivers/gpu/drm/i915/display/intel_display.c needs_modeset(new_crtc_state) ? new_crtc_state 13704 drivers/gpu/drm/i915/display/intel_display.c new_crtc_state, i) new_crtc_state 13705 drivers/gpu/drm/i915/display/intel_display.c intel_dump_pipe_config(new_crtc_state, state, "[failed]"); new_crtc_state 13730 drivers/gpu/drm/i915/display/intel_display.c struct intel_crtc_state *new_crtc_state) new_crtc_state 13734 drivers/gpu/drm/i915/display/intel_display.c bool modeset = needs_modeset(new_crtc_state); new_crtc_state 13740 drivers/gpu/drm/i915/display/intel_display.c update_scanline_offset(new_crtc_state); new_crtc_state 13741 drivers/gpu/drm/i915/display/intel_display.c dev_priv->display.crtc_enable(new_crtc_state, state); new_crtc_state 13746 drivers/gpu/drm/i915/display/intel_display.c if (new_crtc_state->preload_luts && new_crtc_state 13747 drivers/gpu/drm/i915/display/intel_display.c (new_crtc_state->base.color_mgmt_changed || new_crtc_state 13748 drivers/gpu/drm/i915/display/intel_display.c new_crtc_state->update_pipe)) new_crtc_state 13749 drivers/gpu/drm/i915/display/intel_display.c intel_color_load_luts(new_crtc_state); new_crtc_state 13751 drivers/gpu/drm/i915/display/intel_display.c intel_pre_plane_update(old_crtc_state, new_crtc_state); new_crtc_state 13753 drivers/gpu/drm/i915/display/intel_display.c if (new_crtc_state->update_pipe) new_crtc_state 13754 drivers/gpu/drm/i915/display/intel_display.c intel_encoders_update_pipe(crtc, new_crtc_state, state); new_crtc_state 13757 drivers/gpu/drm/i915/display/intel_display.c if (new_crtc_state->update_pipe && !new_crtc_state->enable_fbc) new_crtc_state 13760 drivers/gpu/drm/i915/display/intel_display.c intel_fbc_enable(crtc, new_crtc_state, new_plane_state); new_crtc_state 13775 drivers/gpu/drm/i915/display/intel_display.c struct intel_crtc_state *old_crtc_state, *new_crtc_state; new_crtc_state 13778 drivers/gpu/drm/i915/display/intel_display.c for_each_oldnew_intel_crtc_in_state(state, crtc, old_crtc_state, new_crtc_state, i) { new_crtc_state 13779 drivers/gpu/drm/i915/display/intel_display.c if (!new_crtc_state->base.active) new_crtc_state 13783 drivers/gpu/drm/i915/display/intel_display.c new_crtc_state); new_crtc_state 13791 drivers/gpu/drm/i915/display/intel_display.c struct intel_crtc_state *old_crtc_state, *new_crtc_state; new_crtc_state 13800 drivers/gpu/drm/i915/display/intel_display.c for_each_oldnew_intel_crtc_in_state(state, crtc, old_crtc_state, new_crtc_state, i) new_crtc_state 13802 drivers/gpu/drm/i915/display/intel_display.c if (new_crtc_state->base.active) new_crtc_state 13818 drivers/gpu/drm/i915/display/intel_display.c for_each_oldnew_intel_crtc_in_state(state, crtc, old_crtc_state, new_crtc_state, i) { new_crtc_state 13824 drivers/gpu/drm/i915/display/intel_display.c if (updated & cmask || !new_crtc_state->base.active) new_crtc_state 13827 drivers/gpu/drm/i915/display/intel_display.c if (skl_ddb_allocation_overlaps(&new_crtc_state->wm.skl.ddb, new_crtc_state 13833 drivers/gpu/drm/i915/display/intel_display.c entries[i] = new_crtc_state->wm.skl.ddb; new_crtc_state 13841 drivers/gpu/drm/i915/display/intel_display.c if (!skl_ddb_entry_equal(&new_crtc_state->wm.skl.ddb, new_crtc_state 13843 drivers/gpu/drm/i915/display/intel_display.c !new_crtc_state->base.active_changed && new_crtc_state 13848 drivers/gpu/drm/i915/display/intel_display.c new_crtc_state); new_crtc_state 13924 drivers/gpu/drm/i915/display/intel_display.c struct intel_crtc_state *new_crtc_state, *old_crtc_state; new_crtc_state 13937 drivers/gpu/drm/i915/display/intel_display.c for_each_oldnew_intel_crtc_in_state(state, crtc, old_crtc_state, new_crtc_state, i) { new_crtc_state 13938 drivers/gpu/drm/i915/display/intel_display.c if (needs_modeset(new_crtc_state) || new_crtc_state 13939 drivers/gpu/drm/i915/display/intel_display.c new_crtc_state->update_pipe) { new_crtc_state 13942 drivers/gpu/drm/i915/display/intel_display.c modeset_get_crtc_power_domains(new_crtc_state); new_crtc_state 13945 drivers/gpu/drm/i915/display/intel_display.c if (!needs_modeset(new_crtc_state)) new_crtc_state 13948 drivers/gpu/drm/i915/display/intel_display.c intel_pre_plane_update(old_crtc_state, new_crtc_state); new_crtc_state 13972 drivers/gpu/drm/i915/display/intel_display.c if (!new_crtc_state->base.active && new_crtc_state 13976 drivers/gpu/drm/i915/display/intel_display.c new_crtc_state); new_crtc_state 13981 drivers/gpu/drm/i915/display/intel_display.c for_each_new_intel_crtc_in_state(state, crtc, new_crtc_state, i) new_crtc_state 13982 drivers/gpu/drm/i915/display/intel_display.c crtc->config = new_crtc_state; new_crtc_state 14003 drivers/gpu/drm/i915/display/intel_display.c for_each_new_intel_crtc_in_state(state, crtc, new_crtc_state, i) { new_crtc_state 14004 drivers/gpu/drm/i915/display/intel_display.c bool modeset = needs_modeset(new_crtc_state); new_crtc_state 14007 drivers/gpu/drm/i915/display/intel_display.c if (modeset && !new_crtc_state->base.active && new_crtc_state->base.event) { new_crtc_state 14009 drivers/gpu/drm/i915/display/intel_display.c drm_crtc_send_vblank_event(&crtc->base, new_crtc_state->base.event); new_crtc_state 14012 drivers/gpu/drm/i915/display/intel_display.c new_crtc_state->base.event = NULL; new_crtc_state 14042 drivers/gpu/drm/i915/display/intel_display.c for_each_new_intel_crtc_in_state(state, crtc, new_crtc_state, i) { new_crtc_state 14043 drivers/gpu/drm/i915/display/intel_display.c if (new_crtc_state->base.active && new_crtc_state 14044 drivers/gpu/drm/i915/display/intel_display.c !needs_modeset(new_crtc_state) && new_crtc_state 14045 drivers/gpu/drm/i915/display/intel_display.c !new_crtc_state->preload_luts && new_crtc_state 14046 drivers/gpu/drm/i915/display/intel_display.c (new_crtc_state->base.color_mgmt_changed || new_crtc_state 14047 drivers/gpu/drm/i915/display/intel_display.c new_crtc_state->update_pipe)) new_crtc_state 14048 drivers/gpu/drm/i915/display/intel_display.c intel_color_load_luts(new_crtc_state); new_crtc_state 14058 drivers/gpu/drm/i915/display/intel_display.c for_each_new_intel_crtc_in_state(state, crtc, new_crtc_state, i) { new_crtc_state 14061 drivers/gpu/drm/i915/display/intel_display.c new_crtc_state); new_crtc_state 14064 drivers/gpu/drm/i915/display/intel_display.c for_each_oldnew_intel_crtc_in_state(state, crtc, old_crtc_state, new_crtc_state, i) { new_crtc_state 14070 drivers/gpu/drm/i915/display/intel_display.c intel_modeset_verify_crtc(crtc, state, old_crtc_state, new_crtc_state); new_crtc_state 14183 drivers/gpu/drm/i915/display/intel_display.c struct intel_crtc_state *new_crtc_state; new_crtc_state 14187 drivers/gpu/drm/i915/display/intel_display.c for_each_new_intel_crtc_in_state(state, crtc, new_crtc_state, i) new_crtc_state 14188 drivers/gpu/drm/i915/display/intel_display.c if (new_crtc_state->wm.need_postvbl_update || new_crtc_state 14189 drivers/gpu/drm/i915/display/intel_display.c new_crtc_state->update_wm_post) new_crtc_state 14538 drivers/gpu/drm/i915/display/intel_display.c struct intel_crtc_state *new_crtc_state = new_crtc_state 14540 drivers/gpu/drm/i915/display/intel_display.c bool modeset = needs_modeset(new_crtc_state); new_crtc_state 14543 drivers/gpu/drm/i915/display/intel_display.c intel_pipe_update_start(new_crtc_state); new_crtc_state 14548 drivers/gpu/drm/i915/display/intel_display.c if (new_crtc_state->base.color_mgmt_changed || new_crtc_state 14549 drivers/gpu/drm/i915/display/intel_display.c new_crtc_state->update_pipe) new_crtc_state 14550 drivers/gpu/drm/i915/display/intel_display.c intel_color_commit(new_crtc_state); new_crtc_state 14552 drivers/gpu/drm/i915/display/intel_display.c if (new_crtc_state->update_pipe) new_crtc_state 14553 drivers/gpu/drm/i915/display/intel_display.c intel_update_pipe_config(old_crtc_state, new_crtc_state); new_crtc_state 14555 drivers/gpu/drm/i915/display/intel_display.c skl_detach_scalers(new_crtc_state); new_crtc_state 14558 drivers/gpu/drm/i915/display/intel_display.c bdw_set_pipemisc(new_crtc_state); new_crtc_state 14563 drivers/gpu/drm/i915/display/intel_display.c new_crtc_state); new_crtc_state 14587 drivers/gpu/drm/i915/display/intel_display.c struct intel_crtc_state *new_crtc_state = new_crtc_state 14590 drivers/gpu/drm/i915/display/intel_display.c intel_pipe_update_end(new_crtc_state); new_crtc_state 14592 drivers/gpu/drm/i915/display/intel_display.c if (new_crtc_state->update_pipe && new_crtc_state 14593 drivers/gpu/drm/i915/display/intel_display.c !needs_modeset(new_crtc_state) && new_crtc_state 14595 drivers/gpu/drm/i915/display/intel_display.c intel_crtc_arm_fifo_underrun(crtc, new_crtc_state); new_crtc_state 14699 drivers/gpu/drm/i915/display/intel_display.c struct intel_crtc_state *new_crtc_state; new_crtc_state 14737 drivers/gpu/drm/i915/display/intel_display.c new_crtc_state = to_intel_crtc_state(intel_crtc_duplicate_state(crtc)); new_crtc_state 14738 drivers/gpu/drm/i915/display/intel_display.c if (!new_crtc_state) { new_crtc_state 14754 drivers/gpu/drm/i915/display/intel_display.c ret = intel_plane_atomic_check_with_state(crtc_state, new_crtc_state, new_crtc_state 14786 drivers/gpu/drm/i915/display/intel_display.c crtc_state->active_planes = new_crtc_state->active_planes; new_crtc_state 14799 drivers/gpu/drm/i915/display/intel_display.c if (new_crtc_state) new_crtc_state 14800 drivers/gpu/drm/i915/display/intel_display.c intel_crtc_destroy_state(crtc, &new_crtc_state->base); new_crtc_state 388 drivers/gpu/drm/i915/display/intel_display.h #define for_each_new_intel_crtc_in_state(__state, crtc, new_crtc_state, __i) \ new_crtc_state 392 drivers/gpu/drm/i915/display/intel_display.h (new_crtc_state) = to_intel_crtc_state((__state)->base.crtcs[__i].new_state), 1); \ new_crtc_state 405 drivers/gpu/drm/i915/display/intel_display.h #define for_each_oldnew_intel_crtc_in_state(__state, crtc, old_crtc_state, new_crtc_state, __i) \ new_crtc_state 410 drivers/gpu/drm/i915/display/intel_display.h (new_crtc_state) = to_intel_crtc_state((__state)->base.crtcs[__i].new_state), 1); \ new_crtc_state 328 drivers/gpu/drm/i915/display/intel_dpll_mgr.c struct intel_crtc_state *new_crtc_state = new_crtc_state 331 drivers/gpu/drm/i915/display/intel_dpll_mgr.c new_crtc_state->shared_dpll = NULL; new_crtc_state 3021 drivers/gpu/drm/i915/display/intel_dpll_mgr.c struct intel_crtc_state *new_crtc_state = new_crtc_state 3025 drivers/gpu/drm/i915/display/intel_dpll_mgr.c new_crtc_state->shared_dpll = NULL; new_crtc_state 3031 drivers/gpu/drm/i915/display/intel_dpll_mgr.c &new_crtc_state->icl_port_dplls[id]; new_crtc_state 946 drivers/gpu/drm/i915/display/intel_psr.c int intel_psr_wait_for_idle(const struct intel_crtc_state *new_crtc_state, new_crtc_state 949 drivers/gpu/drm/i915/display/intel_psr.c struct intel_crtc *crtc = to_intel_crtc(new_crtc_state->base.crtc); new_crtc_state 952 drivers/gpu/drm/i915/display/intel_psr.c if (!dev_priv->psr.enabled || !new_crtc_state->has_psr) new_crtc_state 36 drivers/gpu/drm/i915/display/intel_psr.h int intel_psr_wait_for_idle(const struct intel_crtc_state *new_crtc_state, new_crtc_state 95 drivers/gpu/drm/i915/display/intel_sprite.c void intel_pipe_update_start(const struct intel_crtc_state *new_crtc_state) new_crtc_state 97 drivers/gpu/drm/i915/display/intel_sprite.c struct intel_crtc *crtc = to_intel_crtc(new_crtc_state->base.crtc); new_crtc_state 99 drivers/gpu/drm/i915/display/intel_sprite.c const struct drm_display_mode *adjusted_mode = &new_crtc_state->base.adjusted_mode; new_crtc_state 104 drivers/gpu/drm/i915/display/intel_sprite.c intel_crtc_has_type(new_crtc_state, INTEL_OUTPUT_DSI); new_crtc_state 128 drivers/gpu/drm/i915/display/intel_sprite.c if (intel_psr_wait_for_idle(new_crtc_state, &psr_status)) new_crtc_state 204 drivers/gpu/drm/i915/display/intel_sprite.c void intel_pipe_update_end(struct intel_crtc_state *new_crtc_state) new_crtc_state 206 drivers/gpu/drm/i915/display/intel_sprite.c struct intel_crtc *crtc = to_intel_crtc(new_crtc_state->base.crtc); new_crtc_state 219 drivers/gpu/drm/i915/display/intel_sprite.c if (new_crtc_state->base.event) { new_crtc_state 223 drivers/gpu/drm/i915/display/intel_sprite.c drm_crtc_arm_vblank_event(&crtc->base, new_crtc_state->base.event); new_crtc_state 226 drivers/gpu/drm/i915/display/intel_sprite.c new_crtc_state->base.event = NULL; new_crtc_state 27 drivers/gpu/drm/i915/display/intel_sprite.h void intel_pipe_update_start(const struct intel_crtc_state *new_crtc_state); new_crtc_state 28 drivers/gpu/drm/i915/display/intel_sprite.h void intel_pipe_update_end(struct intel_crtc_state *new_crtc_state); new_crtc_state 1827 drivers/gpu/drm/i915/display/intel_tv.c struct drm_crtc_state *new_crtc_state; new_crtc_state 1835 drivers/gpu/drm/i915/display/intel_tv.c new_crtc_state = drm_atomic_get_new_crtc_state(state, new_state->crtc); new_crtc_state 1844 drivers/gpu/drm/i915/display/intel_tv.c new_crtc_state->connectors_changed = true; new_crtc_state 1421 drivers/gpu/drm/i915/intel_pm.c static int g4x_compute_intermediate_wm(struct intel_crtc_state *new_crtc_state) new_crtc_state 1423 drivers/gpu/drm/i915/intel_pm.c struct intel_crtc *crtc = to_intel_crtc(new_crtc_state->base.crtc); new_crtc_state 1424 drivers/gpu/drm/i915/intel_pm.c struct g4x_wm_state *intermediate = &new_crtc_state->wm.g4x.intermediate; new_crtc_state 1425 drivers/gpu/drm/i915/intel_pm.c const struct g4x_wm_state *optimal = &new_crtc_state->wm.g4x.optimal; new_crtc_state 1427 drivers/gpu/drm/i915/intel_pm.c to_intel_atomic_state(new_crtc_state->base.state); new_crtc_state 1433 drivers/gpu/drm/i915/intel_pm.c if (!new_crtc_state->base.active || drm_atomic_crtc_needs_modeset(&new_crtc_state->base)) { new_crtc_state 1442 drivers/gpu/drm/i915/intel_pm.c !new_crtc_state->disable_cxsr; new_crtc_state 1444 drivers/gpu/drm/i915/intel_pm.c !new_crtc_state->disable_cxsr; new_crtc_state 1492 drivers/gpu/drm/i915/intel_pm.c new_crtc_state->wm.need_postvbl_update = true; new_crtc_state 2054 drivers/gpu/drm/i915/intel_pm.c static int vlv_compute_intermediate_wm(struct intel_crtc_state *new_crtc_state) new_crtc_state 2056 drivers/gpu/drm/i915/intel_pm.c struct intel_crtc *crtc = to_intel_crtc(new_crtc_state->base.crtc); new_crtc_state 2057 drivers/gpu/drm/i915/intel_pm.c struct vlv_wm_state *intermediate = &new_crtc_state->wm.vlv.intermediate; new_crtc_state 2058 drivers/gpu/drm/i915/intel_pm.c const struct vlv_wm_state *optimal = &new_crtc_state->wm.vlv.optimal; new_crtc_state 2060 drivers/gpu/drm/i915/intel_pm.c to_intel_atomic_state(new_crtc_state->base.state); new_crtc_state 2066 drivers/gpu/drm/i915/intel_pm.c if (!new_crtc_state->base.active || drm_atomic_crtc_needs_modeset(&new_crtc_state->base)) { new_crtc_state 2075 drivers/gpu/drm/i915/intel_pm.c !new_crtc_state->disable_cxsr; new_crtc_state 2100 drivers/gpu/drm/i915/intel_pm.c new_crtc_state->wm.need_postvbl_update = true; new_crtc_state 5281 drivers/gpu/drm/i915/intel_pm.c struct intel_crtc_state *new_crtc_state) new_crtc_state 5283 drivers/gpu/drm/i915/intel_pm.c struct intel_atomic_state *state = to_intel_atomic_state(new_crtc_state->base.state); new_crtc_state 5284 drivers/gpu/drm/i915/intel_pm.c struct intel_crtc *crtc = to_intel_crtc(new_crtc_state->base.crtc); new_crtc_state 5293 drivers/gpu/drm/i915/intel_pm.c &new_crtc_state->wm.skl.plane_ddb_y[plane_id]) && new_crtc_state 5295 drivers/gpu/drm/i915/intel_pm.c &new_crtc_state->wm.skl.plane_ddb_uv[plane_id])) new_crtc_state 5302 drivers/gpu/drm/i915/intel_pm.c new_crtc_state->update_planes |= BIT(plane_id); new_crtc_state 5314 drivers/gpu/drm/i915/intel_pm.c struct intel_crtc_state *new_crtc_state; new_crtc_state 5321 drivers/gpu/drm/i915/intel_pm.c new_crtc_state, i) { new_crtc_state 5322 drivers/gpu/drm/i915/intel_pm.c ret = skl_allocate_pipe_ddb(new_crtc_state, ddb); new_crtc_state 5327 drivers/gpu/drm/i915/intel_pm.c new_crtc_state); new_crtc_state 5345 drivers/gpu/drm/i915/intel_pm.c const struct intel_crtc_state *new_crtc_state; new_crtc_state 5354 drivers/gpu/drm/i915/intel_pm.c new_crtc_state, i) { new_crtc_state 5358 drivers/gpu/drm/i915/intel_pm.c new_pipe_wm = &new_crtc_state->wm.skl.optimal; new_crtc_state 5365 drivers/gpu/drm/i915/intel_pm.c new = &new_crtc_state->wm.skl.plane_ddb_y[plane_id]; new_crtc_state 5568 drivers/gpu/drm/i915/intel_pm.c struct intel_crtc_state *new_crtc_state = new_crtc_state 5584 drivers/gpu/drm/i915/intel_pm.c if (!drm_atomic_crtc_needs_modeset(&new_crtc_state->base) && new_crtc_state 5587 drivers/gpu/drm/i915/intel_pm.c &new_crtc_state->wm.skl.optimal.planes[plane_id])) new_crtc_state 5594 drivers/gpu/drm/i915/intel_pm.c new_crtc_state->update_planes |= BIT(plane_id); new_crtc_state 5604 drivers/gpu/drm/i915/intel_pm.c struct intel_crtc_state *new_crtc_state; new_crtc_state 5624 drivers/gpu/drm/i915/intel_pm.c new_crtc_state, i) { new_crtc_state 5625 drivers/gpu/drm/i915/intel_pm.c ret = skl_build_pipe_wm(new_crtc_state); new_crtc_state 5635 drivers/gpu/drm/i915/intel_pm.c &new_crtc_state->wm.skl.optimal)) new_crtc_state 506 drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c struct drm_crtc_state *new_crtc_state, new_crtc_state 510 drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c to_mdp5_crtc_state(new_crtc_state); new_crtc_state 531 drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c ret = mdp5_mixer_assign(new_crtc_state->state, crtc, caps, new_crtc_state 537 drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c mdp5_mixer_release(new_crtc_state->state, old_mixer); new_crtc_state 539 drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c mdp5_mixer_release(new_crtc_state->state, old_r_mixer); new_crtc_state 588 drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c struct drm_crtc_state *new_crtc_state, new_crtc_state 592 drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c to_mdp5_crtc_state(new_crtc_state); new_crtc_state 604 drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c if (!is_fullscreen(new_crtc_state, bpstate)) new_crtc_state 1828 drivers/gpu/drm/nouveau/dispnv50/disp.c struct drm_crtc_state *new_crtc_state, *old_crtc_state; new_crtc_state 1848 drivers/gpu/drm/nouveau/dispnv50/disp.c for_each_oldnew_crtc_in_state(state, crtc, old_crtc_state, new_crtc_state, i) { new_crtc_state 1849 drivers/gpu/drm/nouveau/dispnv50/disp.c struct nv50_head_atom *asyh = nv50_head_atom(new_crtc_state); new_crtc_state 1855 drivers/gpu/drm/nouveau/dispnv50/disp.c if (old_crtc_state->active && !new_crtc_state->active) { new_crtc_state 1931 drivers/gpu/drm/nouveau/dispnv50/disp.c for_each_oldnew_crtc_in_state(state, crtc, old_crtc_state, new_crtc_state, i) { new_crtc_state 1932 drivers/gpu/drm/nouveau/dispnv50/disp.c struct nv50_head_atom *asyh = nv50_head_atom(new_crtc_state); new_crtc_state 1943 drivers/gpu/drm/nouveau/dispnv50/disp.c if (new_crtc_state->active) { new_crtc_state 1948 drivers/gpu/drm/nouveau/dispnv50/disp.c if (new_crtc_state->event) new_crtc_state 1992 drivers/gpu/drm/nouveau/dispnv50/disp.c for_each_new_crtc_in_state(state, crtc, new_crtc_state, i) { new_crtc_state 1993 drivers/gpu/drm/nouveau/dispnv50/disp.c if (new_crtc_state->event) { new_crtc_state 1996 drivers/gpu/drm/nouveau/dispnv50/disp.c if (new_crtc_state->active) new_crtc_state 1999 drivers/gpu/drm/nouveau/dispnv50/disp.c drm_crtc_send_vblank_event(crtc, new_crtc_state->event); new_crtc_state 2002 drivers/gpu/drm/nouveau/dispnv50/disp.c new_crtc_state->event = NULL; new_crtc_state 2003 drivers/gpu/drm/nouveau/dispnv50/disp.c if (new_crtc_state->active) new_crtc_state 2111 drivers/gpu/drm/nouveau/dispnv50/disp.c struct drm_crtc_state *old_crtc_state, *new_crtc_state; new_crtc_state 2119 drivers/gpu/drm/nouveau/dispnv50/disp.c new_crtc_state = drm_atomic_get_new_crtc_state(&atom->state, crtc); new_crtc_state 2120 drivers/gpu/drm/nouveau/dispnv50/disp.c if (old_crtc_state->active && drm_atomic_crtc_needs_modeset(new_crtc_state)) { new_crtc_state 2141 drivers/gpu/drm/nouveau/dispnv50/disp.c struct drm_crtc_state *new_crtc_state; new_crtc_state 2148 drivers/gpu/drm/nouveau/dispnv50/disp.c new_crtc_state = drm_atomic_get_new_crtc_state(&atom->state, crtc); new_crtc_state 2149 drivers/gpu/drm/nouveau/dispnv50/disp.c if (new_crtc_state->active && drm_atomic_crtc_needs_modeset(new_crtc_state)) { new_crtc_state 2167 drivers/gpu/drm/nouveau/dispnv50/disp.c struct drm_crtc_state *new_crtc_state; new_crtc_state 2172 drivers/gpu/drm/nouveau/dispnv50/disp.c for_each_new_crtc_in_state(state, crtc, new_crtc_state, i) { new_crtc_state 2173 drivers/gpu/drm/nouveau/dispnv50/disp.c if (new_crtc_state->color_mgmt_changed) { new_crtc_state 48 drivers/gpu/drm/omapdrm/omap_drv.c struct drm_crtc_state *new_crtc_state; new_crtc_state 53 drivers/gpu/drm/omapdrm/omap_drv.c for_each_new_crtc_in_state(old_state, crtc, new_crtc_state, i) { new_crtc_state 54 drivers/gpu/drm/omapdrm/omap_drv.c if (!new_crtc_state->active) new_crtc_state 212 drivers/gpu/drm/rockchip/analogix_dp-rockchip.c struct drm_crtc_state *new_crtc_state = NULL; new_crtc_state 220 drivers/gpu/drm/rockchip/analogix_dp-rockchip.c new_crtc_state = drm_atomic_get_new_crtc_state(state, crtc); new_crtc_state 222 drivers/gpu/drm/rockchip/analogix_dp-rockchip.c if (!new_crtc_state || !new_crtc_state->self_refresh_active) new_crtc_state 351 drivers/gpu/drm/vc4/vc4_kms.c struct drm_crtc_state *old_crtc_state, *new_crtc_state; new_crtc_state 355 drivers/gpu/drm/vc4/vc4_kms.c for_each_oldnew_crtc_in_state(state, crtc, old_crtc_state, new_crtc_state, i) { new_crtc_state 357 drivers/gpu/drm/vc4/vc4_kms.c if (!new_crtc_state->ctm && old_crtc_state->ctm) { new_crtc_state 365 drivers/gpu/drm/vc4/vc4_kms.c for_each_oldnew_crtc_in_state(state, crtc, old_crtc_state, new_crtc_state, i) { new_crtc_state 366 drivers/gpu/drm/vc4/vc4_kms.c if (new_crtc_state->ctm == old_crtc_state->ctm) new_crtc_state 376 drivers/gpu/drm/vc4/vc4_kms.c if (new_crtc_state->ctm) { new_crtc_state 392 drivers/gpu/drm/vc4/vc4_kms.c ctm = new_crtc_state->ctm->data; new_crtc_state 1604 drivers/gpu/drm/vmwgfx/vmwgfx_kms.c struct drm_crtc_state *old_crtc_state, *new_crtc_state; new_crtc_state 1645 drivers/gpu/drm/vmwgfx/vmwgfx_kms.c new_crtc_state, i) { new_crtc_state 1651 drivers/gpu/drm/vmwgfx/vmwgfx_kms.c if (!du->pref_active && new_crtc_state->enable) { new_crtc_state 751 include/drm/drm_atomic.h #define for_each_oldnew_crtc_in_state(__state, crtc, old_crtc_state, new_crtc_state, __i) \ new_crtc_state 758 include/drm/drm_atomic.h (new_crtc_state) = (__state)->crtcs[__i].new_state, 1)) new_crtc_state 790 include/drm/drm_atomic.h #define for_each_new_crtc_in_state(__state, crtc, new_crtc_state, __i) \ new_crtc_state 796 include/drm/drm_atomic.h (new_crtc_state) = (__state)->crtcs[__i].new_state, 1))