ndiv_int 64 drivers/clk/bcm/clk-cygnus.c .ndiv_int = REG_VAL(0x10, 20, 10), ndiv_int 123 drivers/clk/bcm/clk-cygnus.c .ndiv_int = REG_VAL(0x4, 16, 10), ndiv_int 200 drivers/clk/bcm/clk-cygnus.c .ndiv_int = REG_VAL(0x10, 20, 10), ndiv_int 279 drivers/clk/bcm/clk-cygnus.c .ndiv_int = REG_VAL(0x8, 0, 10), ndiv_int 154 drivers/clk/bcm/clk-iproc-armpll.c unsigned int ndiv_int, ndiv_frac, ndiv; ndiv_int 162 drivers/clk/bcm/clk-iproc-armpll.c ndiv_int = (val >> IPROC_CLK_PLLARM_NDIV_INT_OFFSET_SHIFT) & ndiv_int 164 drivers/clk/bcm/clk-iproc-armpll.c if (ndiv_int == 0) ndiv_int 165 drivers/clk/bcm/clk-iproc-armpll.c ndiv_int = 256; ndiv_int 171 drivers/clk/bcm/clk-iproc-armpll.c ndiv_int = (val >> IPROC_CLK_PLLARMA_NDIV_INT_SHIFT) & ndiv_int 173 drivers/clk/bcm/clk-iproc-armpll.c if (ndiv_int == 0) ndiv_int 174 drivers/clk/bcm/clk-iproc-armpll.c ndiv_int = 1024; ndiv_int 180 drivers/clk/bcm/clk-iproc-armpll.c ndiv = (ndiv_int << 20) | ndiv_frac; ndiv_int 95 drivers/clk/bcm/clk-iproc-pll.c u64 ndiv_int, ndiv_frac, residual; ndiv_int 97 drivers/clk/bcm/clk-iproc-pll.c ndiv_int = target_rate / parent_rate; ndiv_int 99 drivers/clk/bcm/clk-iproc-pll.c if (!ndiv_int || (ndiv_int > 255)) ndiv_int 102 drivers/clk/bcm/clk-iproc-pll.c residual = target_rate - (ndiv_int * parent_rate); ndiv_int 112 drivers/clk/bcm/clk-iproc-pll.c vco_out->ndiv_int = ndiv_int; ndiv_int 116 drivers/clk/bcm/clk-iproc-pll.c vco_out->rate = vco_out->ndiv_int * parent_rate; ndiv_int 291 drivers/clk/bcm/clk-iproc-pll.c u32 ndiv_int; ndiv_int 299 drivers/clk/bcm/clk-iproc-pll.c val = readl(pll->control_base + ctrl->ndiv_int.offset); ndiv_int 300 drivers/clk/bcm/clk-iproc-pll.c ndiv_int = (val >> ctrl->ndiv_int.shift) & ndiv_int 301 drivers/clk/bcm/clk-iproc-pll.c bit_mask(ctrl->ndiv_int.width); ndiv_int 303 drivers/clk/bcm/clk-iproc-pll.c if (ndiv_int != vco->ndiv_int) ndiv_int 405 drivers/clk/bcm/clk-iproc-pll.c val = readl(pll->control_base + ctrl->ndiv_int.offset); ndiv_int 406 drivers/clk/bcm/clk-iproc-pll.c val &= ~(bit_mask(ctrl->ndiv_int.width) << ctrl->ndiv_int.shift); ndiv_int 407 drivers/clk/bcm/clk-iproc-pll.c val |= vco->ndiv_int << ctrl->ndiv_int.shift; ndiv_int 408 drivers/clk/bcm/clk-iproc-pll.c iproc_pll_write(pll, pll->control_base, ctrl->ndiv_int.offset, val); ndiv_int 464 drivers/clk/bcm/clk-iproc-pll.c u64 ndiv, ndiv_int, ndiv_frac; ndiv_int 481 drivers/clk/bcm/clk-iproc-pll.c val = readl(pll->control_base + ctrl->ndiv_int.offset); ndiv_int 482 drivers/clk/bcm/clk-iproc-pll.c ndiv_int = (val >> ctrl->ndiv_int.shift) & ndiv_int 483 drivers/clk/bcm/clk-iproc-pll.c bit_mask(ctrl->ndiv_int.width); ndiv_int 484 drivers/clk/bcm/clk-iproc-pll.c ndiv = ndiv_int << 20; ndiv_int 96 drivers/clk/bcm/clk-iproc.h unsigned int ndiv_int; ndiv_int 172 drivers/clk/bcm/clk-iproc.h struct iproc_clk_reg_op ndiv_int; ndiv_int 46 drivers/clk/bcm/clk-ns2.c .ndiv_int = REG_VAL(0x8, 4, 10), ndiv_int 109 drivers/clk/bcm/clk-ns2.c .ndiv_int = REG_VAL(0x8, 4, 10), ndiv_int 171 drivers/clk/bcm/clk-ns2.c .ndiv_int = REG_VAL(0x8, 4, 10), ndiv_int 233 drivers/clk/bcm/clk-ns2.c .ndiv_int = REG_VAL(0x8, 4, 10), ndiv_int 50 drivers/clk/bcm/clk-nsp.c .ndiv_int = REG_VAL(0x14, 20, 10), ndiv_int 107 drivers/clk/bcm/clk-nsp.c .ndiv_int = REG_VAL(0x4, 20, 8), ndiv_int 41 drivers/clk/bcm/clk-sr.c .ndiv_int = REG_VAL(0x10, 20, 10), ndiv_int 101 drivers/clk/bcm/clk-sr.c .ndiv_int = REG_VAL(0x10, 20, 10), ndiv_int 160 drivers/clk/bcm/clk-sr.c .ndiv_int = REG_VAL(0x10, 20, 10), ndiv_int 195 drivers/clk/bcm/clk-sr.c .ndiv_int = REG_VAL(0x10, 20, 10), ndiv_int 249 drivers/clk/bcm/clk-sr.c .ndiv_int = REG_VAL(0x10, 20, 10), ndiv_int 286 drivers/clk/bcm/clk-sr.c .ndiv_int = REG_VAL(0x4, 16, 10), ndiv_int 331 drivers/clk/bcm/clk-sr.c .ndiv_int = REG_VAL(0x4, 16, 10), ndiv_int 370 drivers/clk/bcm/clk-sr.c .ndiv_int = REG_VAL(0x4, 16, 10), ndiv_int 180 drivers/ssb/driver_chipcommon_pmu.c u8 ndiv_int; ndiv_int 187 drivers/ssb/driver_chipcommon_pmu.c { .freq = 12000, .xf = 1, .p1div = 3, .p2div = 22, .ndiv_int = 0x9, .ndiv_frac = 0xFFFFEF, }, ndiv_int 188 drivers/ssb/driver_chipcommon_pmu.c { .freq = 13000, .xf = 2, .p1div = 1, .p2div = 6, .ndiv_int = 0xb, .ndiv_frac = 0x483483, }, ndiv_int 189 drivers/ssb/driver_chipcommon_pmu.c { .freq = 14400, .xf = 3, .p1div = 1, .p2div = 10, .ndiv_int = 0xa, .ndiv_frac = 0x1C71C7, }, ndiv_int 190 drivers/ssb/driver_chipcommon_pmu.c { .freq = 15360, .xf = 4, .p1div = 1, .p2div = 5, .ndiv_int = 0xb, .ndiv_frac = 0x755555, }, ndiv_int 191 drivers/ssb/driver_chipcommon_pmu.c { .freq = 16200, .xf = 5, .p1div = 1, .p2div = 10, .ndiv_int = 0x5, .ndiv_frac = 0x6E9E06, }, ndiv_int 192 drivers/ssb/driver_chipcommon_pmu.c { .freq = 16800, .xf = 6, .p1div = 1, .p2div = 10, .ndiv_int = 0x5, .ndiv_frac = 0x3CF3CF, }, ndiv_int 193 drivers/ssb/driver_chipcommon_pmu.c { .freq = 19200, .xf = 7, .p1div = 1, .p2div = 9, .ndiv_int = 0x5, .ndiv_frac = 0x17B425, }, ndiv_int 194 drivers/ssb/driver_chipcommon_pmu.c { .freq = 19800, .xf = 8, .p1div = 1, .p2div = 11, .ndiv_int = 0x4, .ndiv_frac = 0xA57EB, }, ndiv_int 195 drivers/ssb/driver_chipcommon_pmu.c { .freq = 20000, .xf = 9, .p1div = 1, .p2div = 11, .ndiv_int = 0x4, .ndiv_frac = 0, }, ndiv_int 196 drivers/ssb/driver_chipcommon_pmu.c { .freq = 24000, .xf = 10, .p1div = 3, .p2div = 11, .ndiv_int = 0xa, .ndiv_frac = 0, }, ndiv_int 197 drivers/ssb/driver_chipcommon_pmu.c { .freq = 25000, .xf = 11, .p1div = 5, .p2div = 16, .ndiv_int = 0xb, .ndiv_frac = 0, }, ndiv_int 198 drivers/ssb/driver_chipcommon_pmu.c { .freq = 26000, .xf = 12, .p1div = 1, .p2div = 2, .ndiv_int = 0x10, .ndiv_frac = 0xEC4EC4, }, ndiv_int 199 drivers/ssb/driver_chipcommon_pmu.c { .freq = 30000, .xf = 13, .p1div = 3, .p2div = 8, .ndiv_int = 0xb, .ndiv_frac = 0, }, ndiv_int 200 drivers/ssb/driver_chipcommon_pmu.c { .freq = 38400, .xf = 14, .p1div = 1, .p2div = 5, .ndiv_int = 0x4, .ndiv_frac = 0x955555, }, ndiv_int 201 drivers/ssb/driver_chipcommon_pmu.c { .freq = 40000, .xf = 15, .p1div = 1, .p2div = 2, .ndiv_int = 0xb, .ndiv_frac = 0, }, ndiv_int 290 drivers/ssb/driver_chipcommon_pmu.c pllctl |= ((u32)e->ndiv_int << SSB_PMU1_PLLCTL2_NDIVINT_SHIFT) & SSB_PMU1_PLLCTL2_NDIVINT;