ndiv_frac          65 drivers/clk/bcm/clk-cygnus.c 	.ndiv_frac = REG_VAL(0x10, 0, 20),
ndiv_frac         201 drivers/clk/bcm/clk-cygnus.c 	.ndiv_frac = REG_VAL(0x10, 0, 20),
ndiv_frac         280 drivers/clk/bcm/clk-cygnus.c 	.ndiv_frac = REG_VAL(0x8, 10, 20),
ndiv_frac         154 drivers/clk/bcm/clk-iproc-armpll.c 	unsigned int ndiv_int, ndiv_frac, ndiv;
ndiv_frac         167 drivers/clk/bcm/clk-iproc-armpll.c 		ndiv_frac = val & IPROC_CLK_PLLARM_NDIV_FRAC_OFFSET_MASK;
ndiv_frac         177 drivers/clk/bcm/clk-iproc-armpll.c 		ndiv_frac = val & IPROC_CLK_PLLARMB_NDIV_FRAC_MASK;
ndiv_frac         180 drivers/clk/bcm/clk-iproc-armpll.c 	ndiv = (ndiv_int << 20) | ndiv_frac;
ndiv_frac          95 drivers/clk/bcm/clk-iproc-pll.c 	u64 ndiv_int, ndiv_frac, residual;
ndiv_frac         110 drivers/clk/bcm/clk-iproc-pll.c 	ndiv_frac = div64_u64((u64)residual, (u64)parent_rate);
ndiv_frac         113 drivers/clk/bcm/clk-iproc-pll.c 	vco_out->ndiv_frac = ndiv_frac;
ndiv_frac         117 drivers/clk/bcm/clk-iproc-pll.c 	residual = (u64)vco_out->ndiv_frac * (u64)parent_rate;
ndiv_frac         367 drivers/clk/bcm/clk-iproc-pll.c 			val = readl(pll->control_base + ctrl->ndiv_frac.offset);
ndiv_frac         368 drivers/clk/bcm/clk-iproc-pll.c 			val &= ~(bit_mask(ctrl->ndiv_frac.width) <<
ndiv_frac         369 drivers/clk/bcm/clk-iproc-pll.c 				 ctrl->ndiv_frac.shift);
ndiv_frac         370 drivers/clk/bcm/clk-iproc-pll.c 			val |= vco->ndiv_frac << ctrl->ndiv_frac.shift;
ndiv_frac         372 drivers/clk/bcm/clk-iproc-pll.c 					ctrl->ndiv_frac.offset, val);
ndiv_frac         412 drivers/clk/bcm/clk-iproc-pll.c 		val = readl(pll->control_base + ctrl->ndiv_frac.offset);
ndiv_frac         413 drivers/clk/bcm/clk-iproc-pll.c 		val &= ~(bit_mask(ctrl->ndiv_frac.width) <<
ndiv_frac         414 drivers/clk/bcm/clk-iproc-pll.c 			 ctrl->ndiv_frac.shift);
ndiv_frac         415 drivers/clk/bcm/clk-iproc-pll.c 		val |= vco->ndiv_frac << ctrl->ndiv_frac.shift;
ndiv_frac         416 drivers/clk/bcm/clk-iproc-pll.c 		iproc_pll_write(pll, pll->control_base, ctrl->ndiv_frac.offset,
ndiv_frac         464 drivers/clk/bcm/clk-iproc-pll.c 	u64 ndiv, ndiv_int, ndiv_frac;
ndiv_frac         487 drivers/clk/bcm/clk-iproc-pll.c 		val = readl(pll->control_base + ctrl->ndiv_frac.offset);
ndiv_frac         488 drivers/clk/bcm/clk-iproc-pll.c 		ndiv_frac = (val >> ctrl->ndiv_frac.shift) &
ndiv_frac         489 drivers/clk/bcm/clk-iproc-pll.c 			bit_mask(ctrl->ndiv_frac.width);
ndiv_frac         490 drivers/clk/bcm/clk-iproc-pll.c 		ndiv += ndiv_frac;
ndiv_frac          97 drivers/clk/bcm/clk-iproc.h 	unsigned int ndiv_frac;
ndiv_frac         173 drivers/clk/bcm/clk-iproc.h 	struct iproc_clk_reg_op ndiv_frac;
ndiv_frac          51 drivers/clk/bcm/clk-nsp.c 	.ndiv_frac = REG_VAL(0x14, 0, 20),
ndiv_frac         108 drivers/clk/bcm/clk-nsp.c 	.ndiv_frac = REG_VAL(0x4, 0, 20),
ndiv_frac          42 drivers/clk/bcm/clk-sr.c 	.ndiv_frac = REG_VAL(0x10, 0, 20),
ndiv_frac         102 drivers/clk/bcm/clk-sr.c 	.ndiv_frac = REG_VAL(0x10, 0, 20),
ndiv_frac         161 drivers/clk/bcm/clk-sr.c 	.ndiv_frac = REG_VAL(0x10, 0, 20),
ndiv_frac         196 drivers/clk/bcm/clk-sr.c 	.ndiv_frac = REG_VAL(0x10, 0, 20),
ndiv_frac         250 drivers/clk/bcm/clk-sr.c 	.ndiv_frac = REG_VAL(0x10, 0, 20),
ndiv_frac         181 drivers/ssb/driver_chipcommon_pmu.c 	u32 ndiv_frac;
ndiv_frac         187 drivers/ssb/driver_chipcommon_pmu.c 	{ .freq = 12000, .xf =  1, .p1div = 3, .p2div = 22, .ndiv_int =  0x9, .ndiv_frac = 0xFFFFEF, },
ndiv_frac         188 drivers/ssb/driver_chipcommon_pmu.c 	{ .freq = 13000, .xf =  2, .p1div = 1, .p2div =  6, .ndiv_int =  0xb, .ndiv_frac = 0x483483, },
ndiv_frac         189 drivers/ssb/driver_chipcommon_pmu.c 	{ .freq = 14400, .xf =  3, .p1div = 1, .p2div = 10, .ndiv_int =  0xa, .ndiv_frac = 0x1C71C7, },
ndiv_frac         190 drivers/ssb/driver_chipcommon_pmu.c 	{ .freq = 15360, .xf =  4, .p1div = 1, .p2div =  5, .ndiv_int =  0xb, .ndiv_frac = 0x755555, },
ndiv_frac         191 drivers/ssb/driver_chipcommon_pmu.c 	{ .freq = 16200, .xf =  5, .p1div = 1, .p2div = 10, .ndiv_int =  0x5, .ndiv_frac = 0x6E9E06, },
ndiv_frac         192 drivers/ssb/driver_chipcommon_pmu.c 	{ .freq = 16800, .xf =  6, .p1div = 1, .p2div = 10, .ndiv_int =  0x5, .ndiv_frac = 0x3CF3CF, },
ndiv_frac         193 drivers/ssb/driver_chipcommon_pmu.c 	{ .freq = 19200, .xf =  7, .p1div = 1, .p2div =  9, .ndiv_int =  0x5, .ndiv_frac = 0x17B425, },
ndiv_frac         194 drivers/ssb/driver_chipcommon_pmu.c 	{ .freq = 19800, .xf =  8, .p1div = 1, .p2div = 11, .ndiv_int =  0x4, .ndiv_frac = 0xA57EB,  },
ndiv_frac         195 drivers/ssb/driver_chipcommon_pmu.c 	{ .freq = 20000, .xf =  9, .p1div = 1, .p2div = 11, .ndiv_int =  0x4, .ndiv_frac = 0,        },
ndiv_frac         196 drivers/ssb/driver_chipcommon_pmu.c 	{ .freq = 24000, .xf = 10, .p1div = 3, .p2div = 11, .ndiv_int =  0xa, .ndiv_frac = 0,        },
ndiv_frac         197 drivers/ssb/driver_chipcommon_pmu.c 	{ .freq = 25000, .xf = 11, .p1div = 5, .p2div = 16, .ndiv_int =  0xb, .ndiv_frac = 0,        },
ndiv_frac         198 drivers/ssb/driver_chipcommon_pmu.c 	{ .freq = 26000, .xf = 12, .p1div = 1, .p2div =  2, .ndiv_int = 0x10, .ndiv_frac = 0xEC4EC4, },
ndiv_frac         199 drivers/ssb/driver_chipcommon_pmu.c 	{ .freq = 30000, .xf = 13, .p1div = 3, .p2div =  8, .ndiv_int =  0xb, .ndiv_frac = 0,        },
ndiv_frac         200 drivers/ssb/driver_chipcommon_pmu.c 	{ .freq = 38400, .xf = 14, .p1div = 1, .p2div =  5, .ndiv_int =  0x4, .ndiv_frac = 0x955555, },
ndiv_frac         201 drivers/ssb/driver_chipcommon_pmu.c 	{ .freq = 40000, .xf = 15, .p1div = 1, .p2div =  2, .ndiv_int =  0xb, .ndiv_frac = 0,        },
ndiv_frac         297 drivers/ssb/driver_chipcommon_pmu.c 	pllctl |= ((u32)e->ndiv_frac << SSB_PMU1_PLLCTL3_NDIVFRAC_SHIFT) & SSB_PMU1_PLLCTL3_NDIVFRAC;