nbox 598 drivers/gpu/drm/i810/i810_dma.c int nbox = sarea_priv->nbox; nbox 617 drivers/gpu/drm/i810/i810_dma.c if (nbox > I810_NR_SAREA_CLIPRECTS) nbox 618 drivers/gpu/drm/i810/i810_dma.c nbox = I810_NR_SAREA_CLIPRECTS; nbox 620 drivers/gpu/drm/i810/i810_dma.c for (i = 0; i < nbox; i++, pbox++) { nbox 671 drivers/gpu/drm/i810/i810_dma.c int nbox = sarea_priv->nbox; nbox 682 drivers/gpu/drm/i810/i810_dma.c if (nbox > I810_NR_SAREA_CLIPRECTS) nbox 683 drivers/gpu/drm/i810/i810_dma.c nbox = I810_NR_SAREA_CLIPRECTS; nbox 685 drivers/gpu/drm/i810/i810_dma.c for (i = 0; i < nbox; i++, pbox++) { nbox 720 drivers/gpu/drm/i810/i810_dma.c int nbox = sarea_priv->nbox; nbox 728 drivers/gpu/drm/i810/i810_dma.c if (nbox > I810_NR_SAREA_CLIPRECTS) nbox 729 drivers/gpu/drm/i810/i810_dma.c nbox = I810_NR_SAREA_CLIPRECTS; nbox 753 drivers/gpu/drm/i810/i810_dma.c if (i < nbox) { nbox 771 drivers/gpu/drm/i810/i810_dma.c } while (++i < nbox); nbox 423 drivers/gpu/drm/mga/mga_state.c if (sarea_priv->nbox > MGA_NR_SAREA_CLIPRECTS) nbox 424 drivers/gpu/drm/mga/mga_state.c sarea_priv->nbox = MGA_NR_SAREA_CLIPRECTS; nbox 486 drivers/gpu/drm/mga/mga_state.c int nbox = sarea_priv->nbox; nbox 499 drivers/gpu/drm/mga/mga_state.c for (i = 0; i < nbox; i++) { nbox 574 drivers/gpu/drm/mga/mga_state.c int nbox = sarea_priv->nbox; nbox 582 drivers/gpu/drm/mga/mga_state.c BEGIN_DMA(4 + nbox); nbox 597 drivers/gpu/drm/mga/mga_state.c for (i = 0; i < nbox; i++) { nbox 639 drivers/gpu/drm/mga/mga_state.c if (i < sarea_priv->nbox) { nbox 654 drivers/gpu/drm/mga/mga_state.c } while (++i < sarea_priv->nbox); nbox 686 drivers/gpu/drm/mga/mga_state.c if (i < sarea_priv->nbox) { nbox 700 drivers/gpu/drm/mga/mga_state.c } while (++i < sarea_priv->nbox); nbox 772 drivers/gpu/drm/mga/mga_state.c int nbox = sarea_priv->nbox; nbox 777 drivers/gpu/drm/mga/mga_state.c BEGIN_DMA(4 + nbox); nbox 792 drivers/gpu/drm/mga/mga_state.c for (i = 0; i < nbox; i++) { nbox 835 drivers/gpu/drm/mga/mga_state.c if (sarea_priv->nbox > MGA_NR_SAREA_CLIPRECTS) nbox 836 drivers/gpu/drm/mga/mga_state.c sarea_priv->nbox = MGA_NR_SAREA_CLIPRECTS; nbox 856 drivers/gpu/drm/mga/mga_state.c if (sarea_priv->nbox > MGA_NR_SAREA_CLIPRECTS) nbox 857 drivers/gpu/drm/mga/mga_state.c sarea_priv->nbox = MGA_NR_SAREA_CLIPRECTS; nbox 989 drivers/gpu/drm/mga/mga_state.c if (sarea_priv->nbox > MGA_NR_SAREA_CLIPRECTS) nbox 990 drivers/gpu/drm/mga/mga_state.c sarea_priv->nbox = MGA_NR_SAREA_CLIPRECTS; nbox 363 drivers/gpu/drm/r128/r128_state.c int nbox = sarea_priv->nbox; nbox 380 drivers/gpu/drm/r128/r128_state.c for (i = 0; i < nbox; i++) { nbox 468 drivers/gpu/drm/r128/r128_state.c int nbox = sarea_priv->nbox; nbox 480 drivers/gpu/drm/r128/r128_state.c for (i = 0; i < nbox; i++) { nbox 582 drivers/gpu/drm/r128/r128_state.c DRM_DEBUG("buf=%d nbox=%d\n", buf->idx, sarea_priv->nbox); nbox 595 drivers/gpu/drm/r128/r128_state.c if (i < sarea_priv->nbox) { nbox 598 drivers/gpu/drm/r128/r128_state.c sarea_priv->nbox - i); nbox 614 drivers/gpu/drm/r128/r128_state.c } while (i < sarea_priv->nbox); nbox 637 drivers/gpu/drm/r128/r128_state.c sarea_priv->nbox = 0; nbox 744 drivers/gpu/drm/r128/r128_state.c if (i < sarea_priv->nbox) { nbox 747 drivers/gpu/drm/r128/r128_state.c sarea_priv->nbox - i); nbox 753 drivers/gpu/drm/r128/r128_state.c } while (i < sarea_priv->nbox); nbox 775 drivers/gpu/drm/r128/r128_state.c sarea_priv->nbox = 0; nbox 1218 drivers/gpu/drm/r128/r128_state.c if (sarea_priv->nbox > R128_NR_SAREA_CLIPRECTS) nbox 1219 drivers/gpu/drm/r128/r128_state.c sarea_priv->nbox = R128_NR_SAREA_CLIPRECTS; nbox 1303 drivers/gpu/drm/r128/r128_state.c if (sarea_priv->nbox > R128_NR_SAREA_CLIPRECTS) nbox 1304 drivers/gpu/drm/r128/r128_state.c sarea_priv->nbox = R128_NR_SAREA_CLIPRECTS; nbox 805 drivers/gpu/drm/savage/savage_state.c unsigned int nbox, nbox 813 drivers/gpu/drm/savage/savage_state.c if (nbox == 0) nbox 832 drivers/gpu/drm/savage/savage_state.c for (i = 0; i < nbox; ++i) { nbox 875 drivers/gpu/drm/savage/savage_state.c unsigned int nbox, const struct drm_clip_rect *boxes) nbox 881 drivers/gpu/drm/savage/savage_state.c if (nbox == 0) nbox 888 drivers/gpu/drm/savage/savage_state.c for (i = 0; i < nbox; ++i) { nbox 909 drivers/gpu/drm/savage/savage_state.c unsigned int nbox, nbox 915 drivers/gpu/drm/savage/savage_state.c for (i = 0; i < nbox; ++i) { nbox 1023 drivers/gpu/drm/savage/savage_state.c if (cmdbuf->nbox) { nbox 1024 drivers/gpu/drm/savage/savage_state.c kbox_addr = kmalloc_array(cmdbuf->nbox, sizeof(struct drm_clip_rect), nbox 1032 drivers/gpu/drm/savage/savage_state.c cmdbuf->nbox * sizeof(struct drm_clip_rect))) { nbox 1084 drivers/gpu/drm/savage/savage_state.c cmdbuf->nbox, cmdbuf->box_addr); nbox 1118 drivers/gpu/drm/savage/savage_state.c cmdbuf->nbox, nbox 1124 drivers/gpu/drm/savage/savage_state.c ret = savage_dispatch_swap(dev_priv, cmdbuf->nbox, nbox 1145 drivers/gpu/drm/savage/savage_state.c cmdbuf->nbox, cmdbuf->box_addr); nbox 162 include/uapi/drm/i810_drm.h unsigned int nbox; nbox 191 include/uapi/drm/mga_drm.h unsigned int nbox; nbox 163 include/uapi/drm/r128_drm.h unsigned int nbox; nbox 448 include/uapi/drm/radeon_drm.h unsigned int nbox; nbox 666 include/uapi/drm/radeon_drm.h int nbox; nbox 123 include/uapi/drm/savage_drm.h unsigned int nbox; /* number of clipping boxes */ nbox 187 include/uapi/drm/via_drm.h unsigned int nbox;