n_vco             217 drivers/gpu/drm/gma500/cdv_intel_display.c 	u32 m, n_vco, p;
n_vco             276 drivers/gpu/drm/gma500/cdv_intel_display.c 	ret = cdv_sb_read(dev, SB_N_VCO(pipe), &n_vco);
n_vco             281 drivers/gpu/drm/gma500/cdv_intel_display.c 	n_vco &= 0xFFFF;
n_vco             282 drivers/gpu/drm/gma500/cdv_intel_display.c 	n_vco |= 0x107;
n_vco             283 drivers/gpu/drm/gma500/cdv_intel_display.c 	n_vco &= ~(SB_N_VCO_SEL_MASK |
n_vco             287 drivers/gpu/drm/gma500/cdv_intel_display.c 	n_vco |= ((clock->n) << SB_N_DIVIDER_SHIFT);
n_vco             290 drivers/gpu/drm/gma500/cdv_intel_display.c 		n_vco |= (2 << SB_N_CB_TUNE_SHIFT);
n_vco             291 drivers/gpu/drm/gma500/cdv_intel_display.c 		n_vco |= (0 << SB_N_VCO_SEL_SHIFT);
n_vco             293 drivers/gpu/drm/gma500/cdv_intel_display.c 		n_vco |= (1 << SB_N_CB_TUNE_SHIFT);
n_vco             294 drivers/gpu/drm/gma500/cdv_intel_display.c 		n_vco |= (1 << SB_N_VCO_SEL_SHIFT);
n_vco             296 drivers/gpu/drm/gma500/cdv_intel_display.c 		n_vco |= (0 << SB_N_CB_TUNE_SHIFT);
n_vco             297 drivers/gpu/drm/gma500/cdv_intel_display.c 		n_vco |= (2 << SB_N_VCO_SEL_SHIFT);
n_vco             299 drivers/gpu/drm/gma500/cdv_intel_display.c 		n_vco |= (0 << SB_N_CB_TUNE_SHIFT);
n_vco             300 drivers/gpu/drm/gma500/cdv_intel_display.c 		n_vco |= (3 << SB_N_VCO_SEL_SHIFT);
n_vco             303 drivers/gpu/drm/gma500/cdv_intel_display.c 	ret = cdv_sb_write(dev, SB_N_VCO(pipe), n_vco);