Nb                 86 arch/arm/include/asm/hardware/locomo.h #define	LOCOMO_GPIO(Nb)		(0x01 << (Nb))
Nb                112 arch/arm/mach-pxa/include/mach/pxa2xx-regs.h #define PWER_GPIO(Nb)	(1 << Nb)	/* GPIO [0..15] wake-up enable     */
Nb                 57 arch/arm/mach-sa1100/include/mach/SA-1100.h #define _PCMCIA(Nb)	        	/* PCMCIA [0..1]                   */ \
Nb                 58 arch/arm/mach-sa1100/include/mach/SA-1100.h                 	(0x20000000 + (Nb)*PCMCIASp)
Nb                 59 arch/arm/mach-sa1100/include/mach/SA-1100.h #define _PCMCIAIO(Nb)	_PCMCIA (Nb)	/* PCMCIA I/O [0..1]               */
Nb                 60 arch/arm/mach-sa1100/include/mach/SA-1100.h #define _PCMCIAAttr(Nb)	        	/* PCMCIA Attribute [0..1]         */ \
Nb                 61 arch/arm/mach-sa1100/include/mach/SA-1100.h                 	(_PCMCIA (Nb) + 2*PCMCIAPrtSp)
Nb                 62 arch/arm/mach-sa1100/include/mach/SA-1100.h #define _PCMCIAMem(Nb)	        	/* PCMCIA Memory [0..1]            */ \
Nb                 63 arch/arm/mach-sa1100/include/mach/SA-1100.h                 	(_PCMCIA (Nb) + 3*PCMCIAPrtSp)
Nb                267 arch/arm/mach-sa1100/include/mach/SA-1100.h #define _UTCR0(Nb)	__REG(0x80010000 + ((Nb) - 1)*0x00020000)  /* UART Control Reg. 0 [1..3] */
Nb                268 arch/arm/mach-sa1100/include/mach/SA-1100.h #define _UTCR1(Nb)	__REG(0x80010004 + ((Nb) - 1)*0x00020000)  /* UART Control Reg. 1 [1..3] */
Nb                269 arch/arm/mach-sa1100/include/mach/SA-1100.h #define _UTCR2(Nb)	__REG(0x80010008 + ((Nb) - 1)*0x00020000)  /* UART Control Reg. 2 [1..3] */
Nb                270 arch/arm/mach-sa1100/include/mach/SA-1100.h #define _UTCR3(Nb)	__REG(0x8001000C + ((Nb) - 1)*0x00020000)  /* UART Control Reg. 3 [1..3] */
Nb                271 arch/arm/mach-sa1100/include/mach/SA-1100.h #define _UTCR4(Nb)	__REG(0x80010010 + ((Nb) - 1)*0x00020000)  /* UART Control Reg. 4 [2] */
Nb                272 arch/arm/mach-sa1100/include/mach/SA-1100.h #define _UTDR(Nb)	__REG(0x80010014 + ((Nb) - 1)*0x00020000)  /* UART Data Reg. [1..3] */
Nb                273 arch/arm/mach-sa1100/include/mach/SA-1100.h #define _UTSR0(Nb)	__REG(0x8001001C + ((Nb) - 1)*0x00020000)  /* UART Status Reg. 0 [1..3] */
Nb                274 arch/arm/mach-sa1100/include/mach/SA-1100.h #define _UTSR1(Nb)	__REG(0x80010020 + ((Nb) - 1)*0x00020000)  /* UART Status Reg. 1 [1..3] */
Nb                843 arch/arm/mach-sa1100/include/mach/SA-1100.h #define OSSR_M(Nb)	        	/* Match detected [0..3]           */ \
Nb                844 arch/arm/mach-sa1100/include/mach/SA-1100.h                 	(0x00000001 << (Nb))
Nb                853 arch/arm/mach-sa1100/include/mach/SA-1100.h #define OIER_E(Nb)	        	/* match interrupt Enable [0..3]   */ \
Nb                854 arch/arm/mach-sa1100/include/mach/SA-1100.h                 	(0x00000001 << (Nb))
Nb                902 arch/arm/mach-sa1100/include/mach/SA-1100.h #define PWER_GPIO(Nb)	GPIO_GPIO (Nb)	/* GPIO [0..27] wake-up enable     */
Nb               1117 arch/arm/mach-sa1100/include/mach/SA-1100.h #define GPIO_GPIO(Nb)	        	/* GPIO [0..27]                    */ \
Nb               1118 arch/arm/mach-sa1100/include/mach/SA-1100.h                 	(0x00000001 << (Nb))
Nb               1148 arch/arm/mach-sa1100/include/mach/SA-1100.h #define GPIO_LDD(Nb)	        	/* LCD Data [8..15] (O)            */ \
Nb               1149 arch/arm/mach-sa1100/include/mach/SA-1100.h                 	GPIO_GPIO ((Nb) - 6)
Nb               1217 arch/arm/mach-sa1100/include/mach/SA-1100.h #define IC_GPIO(Nb)	        	/* GPIO [0..10]                    */ \
Nb               1218 arch/arm/mach-sa1100/include/mach/SA-1100.h                 	(0x00000001 << (Nb))
Nb               1239 arch/arm/mach-sa1100/include/mach/SA-1100.h #define IC_DMA(Nb)	        	/* DMA controller channel [0..5]   */ \
Nb               1240 arch/arm/mach-sa1100/include/mach/SA-1100.h                 	(0x00100000 << (Nb))
Nb               1247 arch/arm/mach-sa1100/include/mach/SA-1100.h #define IC_OST(Nb)	        	/* OS Timer match [0..3]           */ \
Nb               1248 arch/arm/mach-sa1100/include/mach/SA-1100.h                 	(0x04000000 << (Nb))
Nb               1289 arch/arm/mach-sa1100/include/mach/SA-1100.h #define PPC_LDD(Nb)	        	/* LCD Data [0..7]                 */ \
Nb               1290 arch/arm/mach-sa1100/include/mach/SA-1100.h                 	(0x00000001 << (Nb))
Nb               1374 arch/arm/mach-sa1100/include/mach/SA-1100.h #define MDCNFG_DE(Nb)	        	/* DRAM Enable bank [0..3]         */ \
Nb               1375 arch/arm/mach-sa1100/include/mach/SA-1100.h                 	(0x00000001 << (Nb))
Nb               1447 arch/arm/mach-sa1100/include/mach/SA-1100.h #define MSC_Bnk(Nb)	        	/* static memory Bank [0..3]       */ \
Nb               1448 arch/arm/mach-sa1100/include/mach/SA-1100.h                 	Fld (16, ((Nb) Modulo 2)*16)
Nb               1515 arch/arm/mach-sa1100/include/mach/SA-1100.h #define MECR_PCMCIA(Nb)	        	/* PCMCIA [0..1]                   */ \
Nb               1516 arch/arm/mach-sa1100/include/mach/SA-1100.h                 	Fld (15, (Nb)*16)
Nb                 42 arch/unicore32/include/mach/regs-gpio.h #define GPIO_GPIO(Nb)	(0x00000001 << (Nb))	/* GPIO [0..27] */
Nb                 60 drivers/pcmcia/pxa2xx_base.c #define _PCMCIA(Nb)			/* PCMCIA [0..1]                   */ \
Nb                 61 drivers/pcmcia/pxa2xx_base.c 			(0x20000000 + (Nb) * PCMCIASp)
Nb                 62 drivers/pcmcia/pxa2xx_base.c #define _PCMCIAIO(Nb)	_PCMCIA(Nb)	/* PCMCIA I/O [0..1]               */
Nb                 63 drivers/pcmcia/pxa2xx_base.c #define _PCMCIAAttr(Nb)			/* PCMCIA Attribute [0..1]         */ \
Nb                 64 drivers/pcmcia/pxa2xx_base.c 			(_PCMCIA(Nb) + 2 * PCMCIAPrtSp)
Nb                 65 drivers/pcmcia/pxa2xx_base.c #define _PCMCIAMem(Nb)			/* PCMCIA Memory [0..1]            */ \
Nb                 66 drivers/pcmcia/pxa2xx_base.c 			(_PCMCIA(Nb) + 3 * PCMCIAPrtSp)