nCur80MhzPrimeSC 2919 drivers/staging/rtl8723bs/hal/rtl8723b_hal_init.c 			if (pHalData->nCur80MhzPrimeSC == HAL_PRIME_CHNL_OFFSET_LOWER)
nCur80MhzPrimeSC 2921 drivers/staging/rtl8723bs/hal/rtl8723b_hal_init.c 			else if (pHalData->nCur80MhzPrimeSC == HAL_PRIME_CHNL_OFFSET_UPPER)
nCur80MhzPrimeSC 2926 drivers/staging/rtl8723bs/hal/rtl8723b_hal_init.c 			if ((pHalData->nCur40MhzPrimeSC == HAL_PRIME_CHNL_OFFSET_LOWER) && (pHalData->nCur80MhzPrimeSC == HAL_PRIME_CHNL_OFFSET_LOWER))
nCur80MhzPrimeSC 2928 drivers/staging/rtl8723bs/hal/rtl8723b_hal_init.c 			else if ((pHalData->nCur40MhzPrimeSC == HAL_PRIME_CHNL_OFFSET_UPPER) && (pHalData->nCur80MhzPrimeSC == HAL_PRIME_CHNL_OFFSET_LOWER))
nCur80MhzPrimeSC 2930 drivers/staging/rtl8723bs/hal/rtl8723b_hal_init.c 			else if ((pHalData->nCur40MhzPrimeSC == HAL_PRIME_CHNL_OFFSET_LOWER) && (pHalData->nCur80MhzPrimeSC == HAL_PRIME_CHNL_OFFSET_UPPER))
nCur80MhzPrimeSC 2932 drivers/staging/rtl8723bs/hal/rtl8723b_hal_init.c 			else if ((pHalData->nCur40MhzPrimeSC == HAL_PRIME_CHNL_OFFSET_UPPER) && (pHalData->nCur80MhzPrimeSC == HAL_PRIME_CHNL_OFFSET_UPPER))
nCur80MhzPrimeSC  771 drivers/staging/rtl8723bs/hal/rtl8723b_phycfg.c 			pHalData->nCur80MhzPrimeSC,
nCur80MhzPrimeSC  776 drivers/staging/rtl8723bs/hal/rtl8723b_phycfg.c 		if (pHalData->nCur80MhzPrimeSC == HAL_PRIME_CHNL_OFFSET_LOWER)
nCur80MhzPrimeSC  778 drivers/staging/rtl8723bs/hal/rtl8723b_phycfg.c 		else if (pHalData->nCur80MhzPrimeSC == HAL_PRIME_CHNL_OFFSET_UPPER)
nCur80MhzPrimeSC  785 drivers/staging/rtl8723bs/hal/rtl8723b_phycfg.c 			(pHalData->nCur80MhzPrimeSC == HAL_PRIME_CHNL_OFFSET_LOWER)
nCur80MhzPrimeSC  790 drivers/staging/rtl8723bs/hal/rtl8723b_phycfg.c 			(pHalData->nCur80MhzPrimeSC == HAL_PRIME_CHNL_OFFSET_LOWER)
nCur80MhzPrimeSC  795 drivers/staging/rtl8723bs/hal/rtl8723b_phycfg.c 			(pHalData->nCur80MhzPrimeSC == HAL_PRIME_CHNL_OFFSET_UPPER)
nCur80MhzPrimeSC  800 drivers/staging/rtl8723bs/hal/rtl8723b_phycfg.c 			(pHalData->nCur80MhzPrimeSC == HAL_PRIME_CHNL_OFFSET_UPPER)
nCur80MhzPrimeSC  945 drivers/staging/rtl8723bs/hal/rtl8723b_phycfg.c 	u8 tmpnCur80MhzPrimeSC = pHalData->nCur80MhzPrimeSC;
nCur80MhzPrimeSC  983 drivers/staging/rtl8723bs/hal/rtl8723b_phycfg.c 		pHalData->nCur80MhzPrimeSC = ExtChnlOffsetOf80MHz;
nCur80MhzPrimeSC  999 drivers/staging/rtl8723bs/hal/rtl8723b_phycfg.c 			pHalData->nCur80MhzPrimeSC = tmpnCur80MhzPrimeSC;
nCur80MhzPrimeSC  197 drivers/staging/rtl8723bs/include/hal_data.h 	u8 nCur80MhzPrimeSC;   /* used for primary 40MHz of 80MHz mode */