mxsfb 39 drivers/gpu/drm/mxsfb/mxsfb_crtc.c static u32 set_hsync_pulse_width(struct mxsfb_drm_private *mxsfb, u32 val) mxsfb 41 drivers/gpu/drm/mxsfb/mxsfb_crtc.c return (val & mxsfb->devdata->hs_wdth_mask) << mxsfb 42 drivers/gpu/drm/mxsfb/mxsfb_crtc.c mxsfb->devdata->hs_wdth_shift; mxsfb 46 drivers/gpu/drm/mxsfb/mxsfb_crtc.c static int mxsfb_set_pixel_fmt(struct mxsfb_drm_private *mxsfb) mxsfb 48 drivers/gpu/drm/mxsfb/mxsfb_crtc.c struct drm_crtc *crtc = &mxsfb->pipe.crtc; mxsfb 63 drivers/gpu/drm/mxsfb/mxsfb_crtc.c ctrl1 = readl(mxsfb->base + LCDC_CTRL1); mxsfb 83 drivers/gpu/drm/mxsfb/mxsfb_crtc.c writel(ctrl1, mxsfb->base + LCDC_CTRL1); mxsfb 84 drivers/gpu/drm/mxsfb/mxsfb_crtc.c writel(ctrl, mxsfb->base + LCDC_CTRL); mxsfb 89 drivers/gpu/drm/mxsfb/mxsfb_crtc.c static void mxsfb_set_bus_fmt(struct mxsfb_drm_private *mxsfb) mxsfb 91 drivers/gpu/drm/mxsfb/mxsfb_crtc.c struct drm_crtc *crtc = &mxsfb->pipe.crtc; mxsfb 96 drivers/gpu/drm/mxsfb/mxsfb_crtc.c reg = readl(mxsfb->base + LCDC_CTRL); mxsfb 98 drivers/gpu/drm/mxsfb/mxsfb_crtc.c if (mxsfb->connector.display_info.num_bus_formats) mxsfb 99 drivers/gpu/drm/mxsfb/mxsfb_crtc.c bus_format = mxsfb->connector.display_info.bus_formats[0]; mxsfb 116 drivers/gpu/drm/mxsfb/mxsfb_crtc.c writel(reg, mxsfb->base + LCDC_CTRL); mxsfb 119 drivers/gpu/drm/mxsfb/mxsfb_crtc.c static void mxsfb_enable_controller(struct mxsfb_drm_private *mxsfb) mxsfb 123 drivers/gpu/drm/mxsfb/mxsfb_crtc.c if (mxsfb->clk_disp_axi) mxsfb 124 drivers/gpu/drm/mxsfb/mxsfb_crtc.c clk_prepare_enable(mxsfb->clk_disp_axi); mxsfb 125 drivers/gpu/drm/mxsfb/mxsfb_crtc.c clk_prepare_enable(mxsfb->clk); mxsfb 128 drivers/gpu/drm/mxsfb/mxsfb_crtc.c writel(CTRL_DOTCLK_MODE, mxsfb->base + LCDC_CTRL + REG_SET); mxsfb 131 drivers/gpu/drm/mxsfb/mxsfb_crtc.c reg = readl(mxsfb->base + LCDC_VDCTRL4); mxsfb 133 drivers/gpu/drm/mxsfb/mxsfb_crtc.c writel(reg, mxsfb->base + LCDC_VDCTRL4); mxsfb 135 drivers/gpu/drm/mxsfb/mxsfb_crtc.c writel(CTRL_RUN, mxsfb->base + LCDC_CTRL + REG_SET); mxsfb 138 drivers/gpu/drm/mxsfb/mxsfb_crtc.c static void mxsfb_disable_controller(struct mxsfb_drm_private *mxsfb) mxsfb 146 drivers/gpu/drm/mxsfb/mxsfb_crtc.c writel(CTRL_DOTCLK_MODE, mxsfb->base + LCDC_CTRL + REG_CLR); mxsfb 148 drivers/gpu/drm/mxsfb/mxsfb_crtc.c readl_poll_timeout(mxsfb->base + LCDC_CTRL, reg, !(reg & CTRL_RUN), mxsfb 151 drivers/gpu/drm/mxsfb/mxsfb_crtc.c reg = readl(mxsfb->base + LCDC_VDCTRL4); mxsfb 153 drivers/gpu/drm/mxsfb/mxsfb_crtc.c writel(reg, mxsfb->base + LCDC_VDCTRL4); mxsfb 155 drivers/gpu/drm/mxsfb/mxsfb_crtc.c clk_disable_unprepare(mxsfb->clk); mxsfb 156 drivers/gpu/drm/mxsfb/mxsfb_crtc.c if (mxsfb->clk_disp_axi) mxsfb 157 drivers/gpu/drm/mxsfb/mxsfb_crtc.c clk_disable_unprepare(mxsfb->clk_disp_axi); mxsfb 190 drivers/gpu/drm/mxsfb/mxsfb_crtc.c static dma_addr_t mxsfb_get_fb_paddr(struct mxsfb_drm_private *mxsfb) mxsfb 192 drivers/gpu/drm/mxsfb/mxsfb_crtc.c struct drm_framebuffer *fb = mxsfb->pipe.plane.state->fb; mxsfb 205 drivers/gpu/drm/mxsfb/mxsfb_crtc.c static void mxsfb_crtc_mode_set_nofb(struct mxsfb_drm_private *mxsfb) mxsfb 207 drivers/gpu/drm/mxsfb/mxsfb_crtc.c struct drm_display_mode *m = &mxsfb->pipe.crtc.state->adjusted_mode; mxsfb 208 drivers/gpu/drm/mxsfb/mxsfb_crtc.c const u32 bus_flags = mxsfb->connector.display_info.bus_flags; mxsfb 219 drivers/gpu/drm/mxsfb/mxsfb_crtc.c err = mxsfb_reset_block(mxsfb->base); mxsfb 224 drivers/gpu/drm/mxsfb/mxsfb_crtc.c writel(CTRL1_FIFO_CLEAR, mxsfb->base + LCDC_CTRL1 + REG_SET); mxsfb 226 drivers/gpu/drm/mxsfb/mxsfb_crtc.c err = mxsfb_set_pixel_fmt(mxsfb); mxsfb 230 drivers/gpu/drm/mxsfb/mxsfb_crtc.c clk_set_rate(mxsfb->clk, m->crtc_clock * 1000); mxsfb 234 drivers/gpu/drm/mxsfb/mxsfb_crtc.c mxsfb->base + mxsfb->devdata->transfer_count); mxsfb 258 drivers/gpu/drm/mxsfb/mxsfb_crtc.c writel(vdctrl0, mxsfb->base + LCDC_VDCTRL0); mxsfb 260 drivers/gpu/drm/mxsfb/mxsfb_crtc.c mxsfb_set_bus_fmt(mxsfb); mxsfb 263 drivers/gpu/drm/mxsfb/mxsfb_crtc.c writel(m->crtc_vtotal, mxsfb->base + LCDC_VDCTRL1); mxsfb 267 drivers/gpu/drm/mxsfb/mxsfb_crtc.c writel(set_hsync_pulse_width(mxsfb, hsync_pulse_len) | mxsfb 269 drivers/gpu/drm/mxsfb/mxsfb_crtc.c mxsfb->base + LCDC_VDCTRL2); mxsfb 273 drivers/gpu/drm/mxsfb/mxsfb_crtc.c mxsfb->base + LCDC_VDCTRL3); mxsfb 276 drivers/gpu/drm/mxsfb/mxsfb_crtc.c mxsfb->base + LCDC_VDCTRL4); mxsfb 279 drivers/gpu/drm/mxsfb/mxsfb_crtc.c void mxsfb_crtc_enable(struct mxsfb_drm_private *mxsfb) mxsfb 283 drivers/gpu/drm/mxsfb/mxsfb_crtc.c mxsfb_enable_axi_clk(mxsfb); mxsfb 284 drivers/gpu/drm/mxsfb/mxsfb_crtc.c mxsfb_crtc_mode_set_nofb(mxsfb); mxsfb 287 drivers/gpu/drm/mxsfb/mxsfb_crtc.c paddr = mxsfb_get_fb_paddr(mxsfb); mxsfb 289 drivers/gpu/drm/mxsfb/mxsfb_crtc.c writel(paddr, mxsfb->base + mxsfb->devdata->cur_buf); mxsfb 290 drivers/gpu/drm/mxsfb/mxsfb_crtc.c writel(paddr, mxsfb->base + mxsfb->devdata->next_buf); mxsfb 293 drivers/gpu/drm/mxsfb/mxsfb_crtc.c mxsfb_enable_controller(mxsfb); mxsfb 296 drivers/gpu/drm/mxsfb/mxsfb_crtc.c void mxsfb_crtc_disable(struct mxsfb_drm_private *mxsfb) mxsfb 298 drivers/gpu/drm/mxsfb/mxsfb_crtc.c mxsfb_disable_controller(mxsfb); mxsfb 299 drivers/gpu/drm/mxsfb/mxsfb_crtc.c mxsfb_disable_axi_clk(mxsfb); mxsfb 302 drivers/gpu/drm/mxsfb/mxsfb_crtc.c void mxsfb_plane_atomic_update(struct mxsfb_drm_private *mxsfb, mxsfb 305 drivers/gpu/drm/mxsfb/mxsfb_crtc.c struct drm_simple_display_pipe *pipe = &mxsfb->pipe; mxsfb 323 drivers/gpu/drm/mxsfb/mxsfb_crtc.c paddr = mxsfb_get_fb_paddr(mxsfb); mxsfb 325 drivers/gpu/drm/mxsfb/mxsfb_crtc.c mxsfb_enable_axi_clk(mxsfb); mxsfb 326 drivers/gpu/drm/mxsfb/mxsfb_crtc.c writel(paddr, mxsfb->base + mxsfb->devdata->next_buf); mxsfb 327 drivers/gpu/drm/mxsfb/mxsfb_crtc.c mxsfb_disable_axi_clk(mxsfb); mxsfb 78 drivers/gpu/drm/mxsfb/mxsfb_drv.c void mxsfb_enable_axi_clk(struct mxsfb_drm_private *mxsfb) mxsfb 80 drivers/gpu/drm/mxsfb/mxsfb_drv.c if (mxsfb->clk_axi) mxsfb 81 drivers/gpu/drm/mxsfb/mxsfb_drv.c clk_prepare_enable(mxsfb->clk_axi); mxsfb 84 drivers/gpu/drm/mxsfb/mxsfb_drv.c void mxsfb_disable_axi_clk(struct mxsfb_drm_private *mxsfb) mxsfb 86 drivers/gpu/drm/mxsfb/mxsfb_drv.c if (mxsfb->clk_axi) mxsfb 87 drivers/gpu/drm/mxsfb/mxsfb_drv.c clk_disable_unprepare(mxsfb->clk_axi); mxsfb 104 drivers/gpu/drm/mxsfb/mxsfb_drv.c struct mxsfb_drm_private *mxsfb = drm_pipe_to_mxsfb_drm_private(pipe); mxsfb 108 drivers/gpu/drm/mxsfb/mxsfb_drv.c drm_panel_prepare(mxsfb->panel); mxsfb 109 drivers/gpu/drm/mxsfb/mxsfb_drv.c mxsfb_crtc_enable(mxsfb); mxsfb 110 drivers/gpu/drm/mxsfb/mxsfb_drv.c drm_panel_enable(mxsfb->panel); mxsfb 115 drivers/gpu/drm/mxsfb/mxsfb_drv.c struct mxsfb_drm_private *mxsfb = drm_pipe_to_mxsfb_drm_private(pipe); mxsfb 120 drivers/gpu/drm/mxsfb/mxsfb_drv.c drm_panel_disable(mxsfb->panel); mxsfb 121 drivers/gpu/drm/mxsfb/mxsfb_drv.c mxsfb_crtc_disable(mxsfb); mxsfb 122 drivers/gpu/drm/mxsfb/mxsfb_drv.c drm_panel_unprepare(mxsfb->panel); mxsfb 137 drivers/gpu/drm/mxsfb/mxsfb_drv.c struct mxsfb_drm_private *mxsfb = drm_pipe_to_mxsfb_drm_private(pipe); mxsfb 139 drivers/gpu/drm/mxsfb/mxsfb_drv.c mxsfb_plane_atomic_update(mxsfb, plane_state); mxsfb 144 drivers/gpu/drm/mxsfb/mxsfb_drv.c struct mxsfb_drm_private *mxsfb = drm_pipe_to_mxsfb_drm_private(pipe); mxsfb 147 drivers/gpu/drm/mxsfb/mxsfb_drv.c mxsfb_enable_axi_clk(mxsfb); mxsfb 148 drivers/gpu/drm/mxsfb/mxsfb_drv.c writel(CTRL1_CUR_FRAME_DONE_IRQ, mxsfb->base + LCDC_CTRL1 + REG_CLR); mxsfb 149 drivers/gpu/drm/mxsfb/mxsfb_drv.c writel(CTRL1_CUR_FRAME_DONE_IRQ_EN, mxsfb->base + LCDC_CTRL1 + REG_SET); mxsfb 150 drivers/gpu/drm/mxsfb/mxsfb_drv.c mxsfb_disable_axi_clk(mxsfb); mxsfb 157 drivers/gpu/drm/mxsfb/mxsfb_drv.c struct mxsfb_drm_private *mxsfb = drm_pipe_to_mxsfb_drm_private(pipe); mxsfb 160 drivers/gpu/drm/mxsfb/mxsfb_drv.c mxsfb_enable_axi_clk(mxsfb); mxsfb 161 drivers/gpu/drm/mxsfb/mxsfb_drv.c writel(CTRL1_CUR_FRAME_DONE_IRQ_EN, mxsfb->base + LCDC_CTRL1 + REG_CLR); mxsfb 162 drivers/gpu/drm/mxsfb/mxsfb_drv.c writel(CTRL1_CUR_FRAME_DONE_IRQ, mxsfb->base + LCDC_CTRL1 + REG_CLR); mxsfb 163 drivers/gpu/drm/mxsfb/mxsfb_drv.c mxsfb_disable_axi_clk(mxsfb); mxsfb 178 drivers/gpu/drm/mxsfb/mxsfb_drv.c struct mxsfb_drm_private *mxsfb; mxsfb 182 drivers/gpu/drm/mxsfb/mxsfb_drv.c mxsfb = devm_kzalloc(&pdev->dev, sizeof(*mxsfb), GFP_KERNEL); mxsfb 183 drivers/gpu/drm/mxsfb/mxsfb_drv.c if (!mxsfb) mxsfb 186 drivers/gpu/drm/mxsfb/mxsfb_drv.c drm->dev_private = mxsfb; mxsfb 187 drivers/gpu/drm/mxsfb/mxsfb_drv.c mxsfb->devdata = &mxsfb_devdata[pdev->id_entry->driver_data]; mxsfb 190 drivers/gpu/drm/mxsfb/mxsfb_drv.c mxsfb->base = devm_ioremap_resource(drm->dev, res); mxsfb 191 drivers/gpu/drm/mxsfb/mxsfb_drv.c if (IS_ERR(mxsfb->base)) mxsfb 192 drivers/gpu/drm/mxsfb/mxsfb_drv.c return PTR_ERR(mxsfb->base); mxsfb 194 drivers/gpu/drm/mxsfb/mxsfb_drv.c mxsfb->clk = devm_clk_get(drm->dev, NULL); mxsfb 195 drivers/gpu/drm/mxsfb/mxsfb_drv.c if (IS_ERR(mxsfb->clk)) mxsfb 196 drivers/gpu/drm/mxsfb/mxsfb_drv.c return PTR_ERR(mxsfb->clk); mxsfb 198 drivers/gpu/drm/mxsfb/mxsfb_drv.c mxsfb->clk_axi = devm_clk_get(drm->dev, "axi"); mxsfb 199 drivers/gpu/drm/mxsfb/mxsfb_drv.c if (IS_ERR(mxsfb->clk_axi)) mxsfb 200 drivers/gpu/drm/mxsfb/mxsfb_drv.c mxsfb->clk_axi = NULL; mxsfb 202 drivers/gpu/drm/mxsfb/mxsfb_drv.c mxsfb->clk_disp_axi = devm_clk_get(drm->dev, "disp_axi"); mxsfb 203 drivers/gpu/drm/mxsfb/mxsfb_drv.c if (IS_ERR(mxsfb->clk_disp_axi)) mxsfb 204 drivers/gpu/drm/mxsfb/mxsfb_drv.c mxsfb->clk_disp_axi = NULL; mxsfb 227 drivers/gpu/drm/mxsfb/mxsfb_drv.c ret = drm_simple_display_pipe_init(drm, &mxsfb->pipe, &mxsfb_funcs, mxsfb 229 drivers/gpu/drm/mxsfb/mxsfb_drv.c &mxsfb->connector); mxsfb 235 drivers/gpu/drm/mxsfb/mxsfb_drv.c ret = drm_panel_attach(mxsfb->panel, &mxsfb->connector); mxsfb 268 drivers/gpu/drm/mxsfb/mxsfb_drv.c drm_panel_detach(mxsfb->panel); mxsfb 291 drivers/gpu/drm/mxsfb/mxsfb_drv.c struct mxsfb_drm_private *mxsfb = drm->dev_private; mxsfb 293 drivers/gpu/drm/mxsfb/mxsfb_drv.c mxsfb_pipe_disable_vblank(&mxsfb->pipe); mxsfb 299 drivers/gpu/drm/mxsfb/mxsfb_drv.c struct mxsfb_drm_private *mxsfb = drm->dev_private; mxsfb 302 drivers/gpu/drm/mxsfb/mxsfb_drv.c mxsfb_enable_axi_clk(mxsfb); mxsfb 304 drivers/gpu/drm/mxsfb/mxsfb_drv.c reg = readl(mxsfb->base + LCDC_CTRL1); mxsfb 307 drivers/gpu/drm/mxsfb/mxsfb_drv.c drm_crtc_handle_vblank(&mxsfb->pipe.crtc); mxsfb 309 drivers/gpu/drm/mxsfb/mxsfb_drv.c writel(CTRL1_CUR_FRAME_DONE_IRQ, mxsfb->base + LCDC_CTRL1 + REG_CLR); mxsfb 311 drivers/gpu/drm/mxsfb/mxsfb_drv.c mxsfb_disable_axi_clk(mxsfb); mxsfb 37 drivers/gpu/drm/mxsfb/mxsfb_drv.h void mxsfb_enable_axi_clk(struct mxsfb_drm_private *mxsfb); mxsfb 38 drivers/gpu/drm/mxsfb/mxsfb_drv.h void mxsfb_disable_axi_clk(struct mxsfb_drm_private *mxsfb); mxsfb 40 drivers/gpu/drm/mxsfb/mxsfb_drv.h void mxsfb_crtc_enable(struct mxsfb_drm_private *mxsfb); mxsfb 41 drivers/gpu/drm/mxsfb/mxsfb_drv.h void mxsfb_crtc_disable(struct mxsfb_drm_private *mxsfb); mxsfb 42 drivers/gpu/drm/mxsfb/mxsfb_drv.h void mxsfb_plane_atomic_update(struct mxsfb_drm_private *mxsfb, mxsfb 29 drivers/gpu/drm/mxsfb/mxsfb_out.c struct mxsfb_drm_private *mxsfb = mxsfb 32 drivers/gpu/drm/mxsfb/mxsfb_out.c if (mxsfb->panel) mxsfb 33 drivers/gpu/drm/mxsfb/mxsfb_out.c return drm_panel_get_modes(mxsfb->panel); mxsfb 46 drivers/gpu/drm/mxsfb/mxsfb_out.c struct mxsfb_drm_private *mxsfb = mxsfb 49 drivers/gpu/drm/mxsfb/mxsfb_out.c if (mxsfb->panel) mxsfb 57 drivers/gpu/drm/mxsfb/mxsfb_out.c struct mxsfb_drm_private *mxsfb = mxsfb 60 drivers/gpu/drm/mxsfb/mxsfb_out.c if (mxsfb->panel) mxsfb 61 drivers/gpu/drm/mxsfb/mxsfb_out.c drm_panel_detach(mxsfb->panel); mxsfb 78 drivers/gpu/drm/mxsfb/mxsfb_out.c struct mxsfb_drm_private *mxsfb = drm->dev_private; mxsfb 86 drivers/gpu/drm/mxsfb/mxsfb_out.c mxsfb->connector.dpms = DRM_MODE_DPMS_OFF; mxsfb 87 drivers/gpu/drm/mxsfb/mxsfb_out.c mxsfb->connector.polled = 0; mxsfb 88 drivers/gpu/drm/mxsfb/mxsfb_out.c drm_connector_helper_add(&mxsfb->connector, mxsfb 90 drivers/gpu/drm/mxsfb/mxsfb_out.c ret = drm_connector_init(drm, &mxsfb->connector, mxsfb 94 drivers/gpu/drm/mxsfb/mxsfb_out.c mxsfb->panel = panel;