mw_state          515 drivers/gpu/drm/arm/malidp_hw.c 	if (hwdev->mw_state != MW_NOT_ENABLED)
mw_state          516 drivers/gpu/drm/arm/malidp_hw.c 		hwdev->mw_state = MW_RESTART;
mw_state          518 drivers/gpu/drm/arm/malidp_hw.c 		hwdev->mw_state = MW_START;
mw_state          557 drivers/gpu/drm/arm/malidp_hw.c 	if (hwdev->mw_state == MW_START || hwdev->mw_state == MW_RESTART)
mw_state          558 drivers/gpu/drm/arm/malidp_hw.c 		hwdev->mw_state = MW_STOP;
mw_state          855 drivers/gpu/drm/arm/malidp_hw.c 	hwdev->mw_state = MW_ONESHOT;
mw_state         1307 drivers/gpu/drm/arm/malidp_hw.c 		switch (hwdev->mw_state) {
mw_state         1314 drivers/gpu/drm/arm/malidp_hw.c 			hwdev->mw_state = MW_NOT_ENABLED;
mw_state         1373 drivers/gpu/drm/arm/malidp_hw.c 	hwdev->mw_state = MW_NOT_ENABLED;
mw_state          250 drivers/gpu/drm/arm/malidp_hw.h 	u8 mw_state;
mw_state           66 drivers/gpu/drm/arm/malidp_mw.c 	struct malidp_mw_connector_state *mw_state =
mw_state           67 drivers/gpu/drm/arm/malidp_mw.c 		kzalloc(sizeof(*mw_state), GFP_KERNEL);
mw_state           73 drivers/gpu/drm/arm/malidp_mw.c 	__drm_atomic_helper_connector_reset(connector, &mw_state->base);
mw_state           90 drivers/gpu/drm/arm/malidp_mw.c 	struct malidp_mw_connector_state *mw_state, *mw_current_state;
mw_state           95 drivers/gpu/drm/arm/malidp_mw.c 	mw_state = kzalloc(sizeof(*mw_state), GFP_KERNEL);
mw_state           96 drivers/gpu/drm/arm/malidp_mw.c 	if (!mw_state)
mw_state          100 drivers/gpu/drm/arm/malidp_mw.c 	mw_state->rgb2yuv_coeffs = mw_current_state->rgb2yuv_coeffs;
mw_state          101 drivers/gpu/drm/arm/malidp_mw.c 	mw_state->rgb2yuv_initialized = mw_current_state->rgb2yuv_initialized;
mw_state          103 drivers/gpu/drm/arm/malidp_mw.c 	__drm_atomic_helper_connector_duplicate_state(connector, &mw_state->base);
mw_state          105 drivers/gpu/drm/arm/malidp_mw.c 	return &mw_state->base;
mw_state          129 drivers/gpu/drm/arm/malidp_mw.c 	struct malidp_mw_connector_state *mw_state = to_mw_state(conn_state);
mw_state          150 drivers/gpu/drm/arm/malidp_mw.c 	mw_state->format =
mw_state          153 drivers/gpu/drm/arm/malidp_mw.c 	if (mw_state->format == MALIDP_INVALID_FORMAT_ID) {
mw_state          173 drivers/gpu/drm/arm/malidp_mw.c 		mw_state->pitches[i] = fb->pitches[i];
mw_state          174 drivers/gpu/drm/arm/malidp_mw.c 		mw_state->addrs[i] = obj->paddr + fb->offsets[i];
mw_state          176 drivers/gpu/drm/arm/malidp_mw.c 	mw_state->n_planes = n_planes;
mw_state          179 drivers/gpu/drm/arm/malidp_mw.c 		mw_state->rgb2yuv_coeffs = rgb2yuv_coeffs_bt709_limited;
mw_state          244 drivers/gpu/drm/arm/malidp_mw.c 	struct malidp_mw_connector_state *mw_state;
mw_state          249 drivers/gpu/drm/arm/malidp_mw.c 	mw_state = to_mw_state(conn_state);
mw_state          257 drivers/gpu/drm/arm/malidp_mw.c 				     mw_state->pitches[0],
mw_state          258 drivers/gpu/drm/arm/malidp_mw.c 				     &mw_state->addrs[0],
mw_state          259 drivers/gpu/drm/arm/malidp_mw.c 				     mw_state->format);
mw_state          262 drivers/gpu/drm/arm/malidp_mw.c 		hwdev->hw->enable_memwrite(hwdev, mw_state->addrs,
mw_state          263 drivers/gpu/drm/arm/malidp_mw.c 					   mw_state->pitches, mw_state->n_planes,
mw_state          264 drivers/gpu/drm/arm/malidp_mw.c 					   fb->width, fb->height, mw_state->format,
mw_state          265 drivers/gpu/drm/arm/malidp_mw.c 					   !mw_state->rgb2yuv_initialized ?
mw_state          266 drivers/gpu/drm/arm/malidp_mw.c 					   mw_state->rgb2yuv_coeffs : NULL);
mw_state          267 drivers/gpu/drm/arm/malidp_mw.c 		mw_state->rgb2yuv_initialized = !!mw_state->rgb2yuv_coeffs;