mvdd_control     4466 drivers/gpu/drm/amd/amdgpu/si_dpm.c 	if (pi->mvdd_control) {
mvdd_control     4471 drivers/gpu/drm/amd/amdgpu/si_dpm.c 			pi->mvdd_control = false;
mvdd_control     4476 drivers/gpu/drm/amd/amdgpu/si_dpm.c 			pi->mvdd_control = false;
mvdd_control     4599 drivers/gpu/drm/amd/amdgpu/si_dpm.c 	if (pi->mvdd_control) {
mvdd_control     4823 drivers/gpu/drm/amd/amdgpu/si_dpm.c 	if (pi->mvdd_control)
mvdd_control     6793 drivers/gpu/drm/amd/amdgpu/si_dpm.c 	if (pi->mvdd_control)
mvdd_control     7404 drivers/gpu/drm/amd/amdgpu/si_dpm.c 	pi->mvdd_control =
mvdd_control      539 drivers/gpu/drm/amd/amdgpu/si_dpm.h 	bool mvdd_control;
mvdd_control      258 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c 	if (SMU7_VOLTAGE_CONTROL_BY_GPIO == data->mvdd_control) {
mvdd_control      265 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c 	} else if (SMU7_VOLTAGE_CONTROL_BY_SVID2 == data->mvdd_control) {
mvdd_control     1576 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c 	data->mvdd_control = SMU7_VOLTAGE_CONTROL_NONE;
mvdd_control     1636 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c 			data->mvdd_control = SMU7_VOLTAGE_CONTROL_BY_GPIO;
mvdd_control     1639 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c 			data->mvdd_control = SMU7_VOLTAGE_CONTROL_BY_SVID2;
mvdd_control     1656 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c 	if (data->mvdd_control == SMU7_VOLTAGE_CONTROL_NONE)
mvdd_control      230 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.h 	uint32_t                             mvdd_control;
mvdd_control      842 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c 	data->mvdd_control = VEGA10_VOLTAGE_CONTROL_NONE;
mvdd_control      872 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c 			data->mvdd_control = VEGA10_VOLTAGE_CONTROL_BY_SVID2;
mvdd_control     1160 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c 	if (data->mvdd_control == VEGA10_VOLTAGE_CONTROL_BY_SVID2 ||
mvdd_control     1161 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c 			data->mvdd_control == VEGA10_VOLTAGE_CONTROL_NONE) {
mvdd_control      321 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.h 	uint32_t                           mvdd_control;
mvdd_control      400 drivers/gpu/drm/amd/powerplay/hwmgr/vega12_hwmgr.c 	data->mvdd_control = VEGA12_VOLTAGE_CONTROL_NONE;
mvdd_control      324 drivers/gpu/drm/amd/powerplay/hwmgr/vega12_hwmgr.h 	uint32_t                           mvdd_control;
mvdd_control      442 drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.c 	data->mvdd_control = VEGA20_VOLTAGE_CONTROL_NONE;
mvdd_control      449 drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.h 	uint32_t                           mvdd_control;
mvdd_control      910 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c 		if (SMU7_VOLTAGE_CONTROL_BY_GPIO == data->mvdd_control) {
mvdd_control     1355 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c 	if (SMU7_VOLTAGE_CONTROL_NONE != data->mvdd_control) {
mvdd_control     1932 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c 	if (SMU7_VOLTAGE_CONTROL_BY_GPIO == data->mvdd_control) {
mvdd_control      386 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c 			if (SMU7_VOLTAGE_CONTROL_NONE == data->mvdd_control)
mvdd_control      411 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c 	if (SMU7_VOLTAGE_CONTROL_NONE == data->mvdd_control)
mvdd_control     1283 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c 	if (SMU7_VOLTAGE_CONTROL_NONE != data->mvdd_control) {
mvdd_control     1394 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c 	if ((SMU7_VOLTAGE_CONTROL_NONE == data->mvdd_control) ||
mvdd_control     1853 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c 	if (SMU7_VOLTAGE_CONTROL_BY_SVID2 == data->mvdd_control) {
mvdd_control     1856 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c 	} else if (SMU7_VOLTAGE_CONTROL_BY_GPIO == data->mvdd_control) {
mvdd_control      682 drivers/gpu/drm/amd/powerplay/smumgr/iceland_smumgr.c 		if (SMU7_VOLTAGE_CONTROL_BY_GPIO == data->mvdd_control)
mvdd_control     1402 drivers/gpu/drm/amd/powerplay/smumgr/iceland_smumgr.c 	if (SMU7_VOLTAGE_CONTROL_NONE != data->mvdd_control) {
mvdd_control     1920 drivers/gpu/drm/amd/powerplay/smumgr/iceland_smumgr.c 	if (SMU7_VOLTAGE_CONTROL_BY_SVID2 == data->mvdd_control)
mvdd_control      384 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c 			if (SMU7_VOLTAGE_CONTROL_NONE == data->mvdd_control)
mvdd_control      409 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c 	if (SMU7_VOLTAGE_CONTROL_NONE == data->mvdd_control)
mvdd_control      652 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c 	if (SMU7_VOLTAGE_CONTROL_BY_GPIO == data->mvdd_control) {
mvdd_control     1182 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c 	if (SMU7_VOLTAGE_CONTROL_NONE != data->mvdd_control) {
mvdd_control     1259 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c 	if (!((SMU7_VOLTAGE_CONTROL_NONE == data->mvdd_control) ||
mvdd_control     1626 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c 	if (SMU7_VOLTAGE_CONTROL_BY_SVID2 == data->mvdd_control) {
mvdd_control      372 drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c 	if (SMU7_VOLTAGE_CONTROL_BY_GPIO == data->mvdd_control) {
mvdd_control      994 drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c 	if (data->mvdd_control == SMU7_VOLTAGE_CONTROL_NONE)
mvdd_control     1151 drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c 	if (SMU7_VOLTAGE_CONTROL_NONE != data->mvdd_control) {
mvdd_control     1789 drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c 	if (SMU7_VOLTAGE_CONTROL_BY_GPIO == data->mvdd_control) {
mvdd_control      453 drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.c 	if (SMU7_VOLTAGE_CONTROL_BY_GPIO == data->mvdd_control) {
mvdd_control      631 drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.c 			if (SMU7_VOLTAGE_CONTROL_NONE == data->mvdd_control)
mvdd_control      658 drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.c 	if (SMU7_VOLTAGE_CONTROL_NONE == data->mvdd_control)
mvdd_control     1090 drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.c 	if (SMU7_VOLTAGE_CONTROL_NONE != data->mvdd_control) {
mvdd_control     1172 drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.c 	if ((SMU7_VOLTAGE_CONTROL_NONE == data->mvdd_control) ||
mvdd_control     1706 drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.c 	if (SMU7_VOLTAGE_CONTROL_BY_SVID2 == data->mvdd_control) {
mvdd_control     1721 drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.c 	} else if (SMU7_VOLTAGE_CONTROL_BY_GPIO == data->mvdd_control) {
mvdd_control     2405 drivers/gpu/drm/radeon/btc_dpm.c 	if (pi->mvdd_control) {
mvdd_control     2639 drivers/gpu/drm/radeon/btc_dpm.c 	pi->mvdd_control =
mvdd_control     2175 drivers/gpu/drm/radeon/ci_dpm.c 	if (pi->mvdd_control == CISLANDS_VOLTAGE_CONTROL_BY_GPIO) {
mvdd_control     2181 drivers/gpu/drm/radeon/ci_dpm.c 	} else if (pi->mvdd_control == CISLANDS_VOLTAGE_CONTROL_BY_SVID2) {
mvdd_control     2276 drivers/gpu/drm/radeon/ci_dpm.c 		if (pi->mvdd_control == CISLANDS_VOLTAGE_CONTROL_BY_GPIO)
mvdd_control     2313 drivers/gpu/drm/radeon/ci_dpm.c 	if (pi->mvdd_control != CISLANDS_VOLTAGE_CONTROL_NONE) {
mvdd_control     5878 drivers/gpu/drm/radeon/ci_dpm.c 	pi->mvdd_control = CISLANDS_VOLTAGE_CONTROL_NONE;
mvdd_control     5895 drivers/gpu/drm/radeon/ci_dpm.c 			pi->mvdd_control = CISLANDS_VOLTAGE_CONTROL_BY_GPIO;
mvdd_control     5897 drivers/gpu/drm/radeon/ci_dpm.c 			pi->mvdd_control = CISLANDS_VOLTAGE_CONTROL_BY_SVID2;
mvdd_control      197 drivers/gpu/drm/radeon/ci_dpm.h 	u32 mvdd_control;
mvdd_control      659 drivers/gpu/drm/radeon/cypress_dpm.c 	if (!pi->mvdd_control) {
mvdd_control     1582 drivers/gpu/drm/radeon/cypress_dpm.c 		pi->mvdd_control = false;
mvdd_control     1597 drivers/gpu/drm/radeon/cypress_dpm.c 		pi->mvdd_control = false;
mvdd_control     1605 drivers/gpu/drm/radeon/cypress_dpm.c 		pi->mvdd_control = false;
mvdd_control     1826 drivers/gpu/drm/radeon/cypress_dpm.c 	if (pi->mvdd_control) {
mvdd_control     2075 drivers/gpu/drm/radeon/cypress_dpm.c 	pi->mvdd_control =
mvdd_control     1329 drivers/gpu/drm/radeon/ni_dpm.c 	if (!pi->mvdd_control) {
mvdd_control     4143 drivers/gpu/drm/radeon/ni_dpm.c 	pi->mvdd_control =
mvdd_control      596 drivers/gpu/drm/radeon/rv770_dpm.c 	if (!pi->mvdd_control) {
mvdd_control     1147 drivers/gpu/drm/radeon/rv770_dpm.c 	if (pi->mvdd_control) {
mvdd_control     1317 drivers/gpu/drm/radeon/rv770_dpm.c 		pi->mvdd_control = false;
mvdd_control     1325 drivers/gpu/drm/radeon/rv770_dpm.c 		pi->mvdd_control = false;
mvdd_control     1917 drivers/gpu/drm/radeon/rv770_dpm.c 	if (pi->mvdd_control) {
mvdd_control     2391 drivers/gpu/drm/radeon/rv770_dpm.c 	pi->mvdd_control =
mvdd_control       83 drivers/gpu/drm/radeon/rv770_dpm.h 	bool mvdd_control;
mvdd_control     4004 drivers/gpu/drm/radeon/si_dpm.c 	if (pi->mvdd_control) {
mvdd_control     4009 drivers/gpu/drm/radeon/si_dpm.c 			pi->mvdd_control = false;
mvdd_control     4014 drivers/gpu/drm/radeon/si_dpm.c 			pi->mvdd_control = false;
mvdd_control     4137 drivers/gpu/drm/radeon/si_dpm.c 	if (pi->mvdd_control) {
mvdd_control     4359 drivers/gpu/drm/radeon/si_dpm.c 	if (pi->mvdd_control)
mvdd_control     6361 drivers/gpu/drm/radeon/si_dpm.c 	if (pi->mvdd_control)
mvdd_control     7014 drivers/gpu/drm/radeon/si_dpm.c 	pi->mvdd_control =