mux_vpll0_vpll1_xin24m_p  130 drivers/clk/rockchip/clk-rk3308.c PNAME(mux_vpll0_vpll1_xin24m_p)	= { "vpll0", "vpll1", "xin24m" };
mux_vpll0_vpll1_xin24m_p  621 drivers/clk/rockchip/clk-rk3308.c 	COMPOSITE_NODIV(0, "clk_audio_src", mux_vpll0_vpll1_xin24m_p, 0,
mux_vpll0_vpll1_xin24m_p  631 drivers/clk/rockchip/clk-rk3308.c 	COMPOSITE(0, "clk_pdm_src", mux_vpll0_vpll1_xin24m_p, 0,
mux_vpll0_vpll1_xin24m_p  641 drivers/clk/rockchip/clk-rk3308.c 	COMPOSITE(SCLK_I2S0_8CH_TX_SRC, "clk_i2s0_8ch_tx_src", mux_vpll0_vpll1_xin24m_p, 0,
mux_vpll0_vpll1_xin24m_p  655 drivers/clk/rockchip/clk-rk3308.c 	COMPOSITE(SCLK_I2S0_8CH_RX_SRC, "clk_i2s0_8ch_rx_src", mux_vpll0_vpll1_xin24m_p, 0,
mux_vpll0_vpll1_xin24m_p  668 drivers/clk/rockchip/clk-rk3308.c 	COMPOSITE(SCLK_I2S1_8CH_TX_SRC, "clk_i2s1_8ch_tx_src", mux_vpll0_vpll1_xin24m_p, 0,
mux_vpll0_vpll1_xin24m_p  682 drivers/clk/rockchip/clk-rk3308.c 	COMPOSITE(SCLK_I2S1_8CH_RX_SRC, "clk_i2s1_8ch_rx_src", mux_vpll0_vpll1_xin24m_p, 0,
mux_vpll0_vpll1_xin24m_p  695 drivers/clk/rockchip/clk-rk3308.c 	COMPOSITE(SCLK_I2S2_8CH_TX_SRC, "clk_i2s2_8ch_tx_src", mux_vpll0_vpll1_xin24m_p, 0,
mux_vpll0_vpll1_xin24m_p  709 drivers/clk/rockchip/clk-rk3308.c 	COMPOSITE(SCLK_I2S2_8CH_RX_SRC, "clk_i2s2_8ch_rx_src", mux_vpll0_vpll1_xin24m_p, 0,
mux_vpll0_vpll1_xin24m_p  722 drivers/clk/rockchip/clk-rk3308.c 	COMPOSITE(SCLK_I2S3_8CH_TX_SRC, "clk_i2s3_8ch_tx_src", mux_vpll0_vpll1_xin24m_p, 0,
mux_vpll0_vpll1_xin24m_p  736 drivers/clk/rockchip/clk-rk3308.c 	COMPOSITE(SCLK_I2S3_8CH_RX_SRC, "clk_i2s3_8ch_rx_src", mux_vpll0_vpll1_xin24m_p, 0,
mux_vpll0_vpll1_xin24m_p  749 drivers/clk/rockchip/clk-rk3308.c 	COMPOSITE(SCLK_I2S0_2CH_SRC, "clk_i2s0_2ch_src", mux_vpll0_vpll1_xin24m_p, 0,
mux_vpll0_vpll1_xin24m_p  762 drivers/clk/rockchip/clk-rk3308.c 	COMPOSITE(SCLK_I2S1_2CH_SRC, "clk_i2s1_2ch_src", mux_vpll0_vpll1_xin24m_p, 0,
mux_vpll0_vpll1_xin24m_p  775 drivers/clk/rockchip/clk-rk3308.c 	COMPOSITE(SCLK_SPDIF_TX_DIV, "clk_spdif_tx_div", mux_vpll0_vpll1_xin24m_p, CLK_IGNORE_UNUSED,
mux_vpll0_vpll1_xin24m_p  778 drivers/clk/rockchip/clk-rk3308.c 	COMPOSITE(SCLK_SPDIF_TX_DIV50, "clk_spdif_tx_div50", mux_vpll0_vpll1_xin24m_p, CLK_IGNORE_UNUSED,
mux_vpll0_vpll1_xin24m_p  790 drivers/clk/rockchip/clk-rk3308.c 	COMPOSITE(SCLK_SPDIF_RX_DIV, "clk_spdif_rx_div", mux_vpll0_vpll1_xin24m_p, CLK_IGNORE_UNUSED,
mux_vpll0_vpll1_xin24m_p  793 drivers/clk/rockchip/clk-rk3308.c 	COMPOSITE(SCLK_SPDIF_RX_DIV50, "clk_spdif_rx_div50", mux_vpll0_vpll1_xin24m_p, CLK_IGNORE_UNUSED,