mux_uart3_p       164 drivers/clk/rockchip/clk-px30.c PNAME(mux_uart3_p)		= { "clk_uart3_src", "clk_uart3_np5", "clk_uart3_frac" };
mux_uart3_p       232 drivers/clk/rockchip/clk-px30.c 	MUX(0, "clk_uart3_mux", mux_uart3_p, CLK_SET_RATE_PARENT,
mux_uart3_p       205 drivers/clk/rockchip/clk-rk3288.c PNAME(mux_uart3_p)	= { "uart3_src", "uart3_frac", "xin24m" };
mux_uart3_p       269 drivers/clk/rockchip/clk-rk3288.c 	MUX(SCLK_UART3, "sclk_uart3", mux_uart3_p, CLK_SET_RATE_PARENT,
mux_uart3_p       134 drivers/clk/rockchip/clk-rk3308.c PNAME(mux_uart3_p)		= { "clk_uart3_src", "dummy", "clk_uart3_frac" };
mux_uart3_p       211 drivers/clk/rockchip/clk-rk3308.c 	MUX(0, "clk_uart3_mux", mux_uart3_p, CLK_SET_RATE_PARENT,
mux_uart3_p       124 drivers/clk/rockchip/clk-rk3368.c PNAME(mux_uart3_p)		= { "uart3_src", "uart3_frac", "xin24m" };
mux_uart3_p       265 drivers/clk/rockchip/clk-rk3368.c 	MUX(SCLK_UART3, "sclk_uart3", mux_uart3_p, CLK_SET_RATE_PARENT,
mux_uart3_p       205 drivers/clk/rockchip/clk-rk3399.c PNAME(mux_uart3_p)	= { "clk_uart3_div", "clk_uart3_frac", "xin24m" };
mux_uart3_p       272 drivers/clk/rockchip/clk-rk3399.c 	MUX(SCLK_UART3, "clk_uart3", mux_uart3_p, CLK_SET_RATE_PARENT,