mux_pllp_pllm_plld_plla_pllc_plld2_clkm 384 drivers/clk/tegra/clk-tegra-periph.c static const char *mux_pllp_pllm_plld_plla_pllc_plld2_clkm[] = { mux_pllp_pllm_plld_plla_pllc_plld2_clkm 720 drivers/clk/tegra/clk-tegra-periph.c MUX8("hdmi", mux_pllp_pllm_plld_plla_pllc_plld2_clkm, CLK_SOURCE_HDMI, 51, 0, tegra_clk_hdmi), mux_pllp_pllm_plld_plla_pllc_plld2_clkm 734 drivers/clk/tegra/clk-tegra-periph.c MUX8_NOGATE_LOCK("sor0_lvds", mux_pllp_pllm_plld_plla_pllc_plld2_clkm, CLK_SOURCE_SOR0, tegra_clk_sor0_lvds, &sor0_lock), mux_pllp_pllm_plld_plla_pllc_plld2_clkm 737 drivers/clk/tegra/clk-tegra-periph.c NODIV("disp1", mux_pllp_pllm_plld_plla_pllc_plld2_clkm, CLK_SOURCE_DISP1, 29, 7, 27, 0, tegra_clk_disp1, NULL), mux_pllp_pllm_plld_plla_pllc_plld2_clkm 739 drivers/clk/tegra/clk-tegra-periph.c NODIV("disp2", mux_pllp_pllm_plld_plla_pllc_plld2_clkm, CLK_SOURCE_DISP2, 29, 7, 26, 0, tegra_clk_disp2, NULL),