mux_pll_src_vpll_cpll_gpll_p  150 drivers/clk/rockchip/clk-rk3399.c PNAME(mux_pll_src_vpll_cpll_gpll_p)		= { "vpll", "cpll", "gpll" };
mux_pll_src_vpll_cpll_gpll_p 1161 drivers/clk/rockchip/clk-rk3399.c 	COMPOSITE(DCLK_VOP0_DIV, "dclk_vop0_div", mux_pll_src_vpll_cpll_gpll_p, 0,
mux_pll_src_vpll_cpll_gpll_p 1191 drivers/clk/rockchip/clk-rk3399.c 	COMPOSITE(DCLK_VOP1_DIV, "dclk_vop1_div", mux_pll_src_vpll_cpll_gpll_p, 0,