mux_pll_src_cpll_gpll_npll_ppll_p  137 drivers/clk/rockchip/clk-rk3399.c PNAME(mux_pll_src_cpll_gpll_npll_ppll_p)	= { "cpll", "gpll", "npll",
mux_pll_src_cpll_gpll_npll_ppll_p  735 drivers/clk/rockchip/clk-rk3399.c 	COMPOSITE(0, "aclk_vcodec_pre", mux_pll_src_cpll_gpll_npll_ppll_p, 0,
mux_pll_src_cpll_gpll_npll_ppll_p  759 drivers/clk/rockchip/clk-rk3399.c 	COMPOSITE(0, "aclk_vdu_pre", mux_pll_src_cpll_gpll_npll_ppll_p, 0,
mux_pll_src_cpll_gpll_npll_ppll_p  776 drivers/clk/rockchip/clk-rk3399.c 	COMPOSITE(0, "aclk_iep_pre", mux_pll_src_cpll_gpll_npll_ppll_p, 0,
mux_pll_src_cpll_gpll_npll_ppll_p  793 drivers/clk/rockchip/clk-rk3399.c 	COMPOSITE(SCLK_RGA_CORE, "clk_rga_core", mux_pll_src_cpll_gpll_npll_ppll_p, 0,
mux_pll_src_cpll_gpll_npll_ppll_p  797 drivers/clk/rockchip/clk-rk3399.c 	COMPOSITE(0, "aclk_rga_pre", mux_pll_src_cpll_gpll_npll_ppll_p, 0,