mux_pll_src_cpll_gpll_npll_p  193 drivers/clk/rockchip/clk-rk3288.c PNAME(mux_pll_src_cpll_gpll_npll_p)	= { "cpll", "gpll", "npll" };
mux_pll_src_cpll_gpll_npll_p  441 drivers/clk/rockchip/clk-rk3288.c 	COMPOSITE(DCLK_VOP0, "dclk_vop0", mux_pll_src_cpll_gpll_npll_p, 0,
mux_pll_src_cpll_gpll_npll_p  444 drivers/clk/rockchip/clk-rk3288.c 	COMPOSITE(DCLK_VOP1, "dclk_vop1", mux_pll_src_cpll_gpll_npll_p, 0,
mux_pll_src_cpll_gpll_npll_p  451 drivers/clk/rockchip/clk-rk3288.c 	COMPOSITE(SCLK_EDP, "sclk_edp", mux_pll_src_cpll_gpll_npll_p, 0,
mux_pll_src_cpll_gpll_npll_p  455 drivers/clk/rockchip/clk-rk3288.c 	COMPOSITE(SCLK_ISP, "sclk_isp", mux_pll_src_cpll_gpll_npll_p, 0,
mux_pll_src_cpll_gpll_npll_p  458 drivers/clk/rockchip/clk-rk3288.c 	COMPOSITE(SCLK_ISP_JPE, "sclk_isp_jpe", mux_pll_src_cpll_gpll_npll_p, 0,
mux_pll_src_cpll_gpll_npll_p  467 drivers/clk/rockchip/clk-rk3288.c 	COMPOSITE(ACLK_HEVC, "aclk_hevc", mux_pll_src_cpll_gpll_npll_p, 0,
mux_pll_src_cpll_gpll_npll_p  473 drivers/clk/rockchip/clk-rk3288.c 	COMPOSITE(SCLK_HEVC_CABAC, "sclk_hevc_cabac", mux_pll_src_cpll_gpll_npll_p, 0,
mux_pll_src_cpll_gpll_npll_p  476 drivers/clk/rockchip/clk-rk3288.c 	COMPOSITE(SCLK_HEVC_CORE, "sclk_hevc_core", mux_pll_src_cpll_gpll_npll_p, 0,
mux_pll_src_cpll_gpll_npll_p  550 drivers/clk/rockchip/clk-rk3288.c 	COMPOSITE(0, "sclk_tsp", mux_pll_src_cpll_gpll_npll_p, 0,
mux_pll_src_cpll_gpll_npll_p   98 drivers/clk/rockchip/clk-rk3368.c PNAME(mux_pll_src_cpll_gpll_npll_p)	= { "cpll", "gpll", "npll" };
mux_pll_src_cpll_gpll_npll_p  396 drivers/clk/rockchip/clk-rk3368.c 	COMPOSITE(0, "sclk_tsp", mux_pll_src_cpll_gpll_npll_p, 0,
mux_pll_src_cpll_gpll_npll_p  448 drivers/clk/rockchip/clk-rk3368.c 	COMPOSITE(DCLK_VOP, "dclk_vop", mux_pll_src_cpll_gpll_npll_p, 0,
mux_pll_src_cpll_gpll_npll_p  133 drivers/clk/rockchip/clk-rk3399.c PNAME(mux_pll_src_cpll_gpll_npll_p)		= { "cpll", "gpll", "npll" };
mux_pll_src_cpll_gpll_npll_p  421 drivers/clk/rockchip/clk-rk3399.c 	COMPOSITE(ACLK_USB3, "aclk_usb3", mux_pll_src_cpll_gpll_npll_p, 0,
mux_pll_src_cpll_gpll_npll_p  563 drivers/clk/rockchip/clk-rk3399.c 	COMPOSITE(SCLK_MAC, "clk_gmac", mux_pll_src_cpll_gpll_npll_p, 0,
mux_pll_src_cpll_gpll_npll_p  752 drivers/clk/rockchip/clk-rk3399.c 	COMPOSITE(SCLK_VDU_CORE, "clk_vdu_core", mux_pll_src_cpll_gpll_npll_p, 0,
mux_pll_src_cpll_gpll_npll_p  755 drivers/clk/rockchip/clk-rk3399.c 	COMPOSITE(SCLK_VDU_CA, "clk_vdu_ca", mux_pll_src_cpll_gpll_npll_p, 0,
mux_pll_src_cpll_gpll_npll_p  814 drivers/clk/rockchip/clk-rk3399.c 	COMPOSITE(0, "aclk_center", mux_pll_src_cpll_gpll_npll_p, CLK_IGNORE_UNUSED,
mux_pll_src_cpll_gpll_npll_p  915 drivers/clk/rockchip/clk-rk3399.c 	COMPOSITE(0, "clk_pcie_core_cru", mux_pll_src_cpll_gpll_npll_p, 0,
mux_pll_src_cpll_gpll_npll_p 1060 drivers/clk/rockchip/clk-rk3399.c 	MUX(0, "clk_testout1_pll_src", mux_pll_src_cpll_gpll_npll_p, 0,
mux_pll_src_cpll_gpll_npll_p 1066 drivers/clk/rockchip/clk-rk3399.c 	MUX(0, "clk_testout2_pll_src", mux_pll_src_cpll_gpll_npll_p, 0,
mux_pll_src_cpll_gpll_npll_p 1223 drivers/clk/rockchip/clk-rk3399.c 	COMPOSITE(SCLK_ISP0, "clk_isp0", mux_pll_src_cpll_gpll_npll_p, 0,
mux_pll_src_cpll_gpll_npll_p 1242 drivers/clk/rockchip/clk-rk3399.c 	COMPOSITE(SCLK_ISP1, "clk_isp1", mux_pll_src_cpll_gpll_npll_p, 0,
mux_pll_src_cpll_gpll_npll_p 1258 drivers/clk/rockchip/clk-rk3399.c 	COMPOSITE_NODIV(0, "clk_cifout_src", mux_pll_src_cpll_gpll_npll_p, 0,