mux_pll_p 136 drivers/clk/rockchip/clk-px30.c PNAME(mux_pll_p) = { "xin24m"}; mux_pll_p 180 drivers/clk/rockchip/clk-px30.c [apll] = PLL(pll_rk3328, PLL_APLL, "apll", mux_pll_p, mux_pll_p 183 drivers/clk/rockchip/clk-px30.c [dpll] = PLL(pll_rk3328, PLL_DPLL, "dpll", mux_pll_p, mux_pll_p 186 drivers/clk/rockchip/clk-px30.c [cpll] = PLL(pll_rk3328, PLL_CPLL, "cpll", mux_pll_p, mux_pll_p 189 drivers/clk/rockchip/clk-px30.c [npll] = PLL(pll_rk3328, PLL_NPLL, "npll", mux_pll_p, mux_pll_p 195 drivers/clk/rockchip/clk-px30.c [gpll] = PLL(pll_rk3328, PLL_GPLL, "gpll", mux_pll_p, 0, PX30_PMU_PLL_CON(0), mux_pll_p 114 drivers/clk/rockchip/clk-rk3036.c PNAME(mux_pll_p) = { "xin24m", "xin24m" }; mux_pll_p 135 drivers/clk/rockchip/clk-rk3036.c [apll] = PLL(pll_rk3036, PLL_APLL, "apll", mux_pll_p, 0, RK2928_PLL_CON(0), mux_pll_p 137 drivers/clk/rockchip/clk-rk3036.c [dpll] = PLL(pll_rk3036, PLL_DPLL, "dpll", mux_pll_p, 0, RK2928_PLL_CON(4), mux_pll_p 139 drivers/clk/rockchip/clk-rk3036.c [gpll] = PLL(pll_rk3036, PLL_GPLL, "gpll", mux_pll_p, 0, RK2928_PLL_CON(12), mux_pll_p 129 drivers/clk/rockchip/clk-rk3128.c PNAME(mux_pll_p) = { "clk_24m", "xin24m" }; mux_pll_p 158 drivers/clk/rockchip/clk-rk3128.c [apll] = PLL(pll_rk3036, PLL_APLL, "apll", mux_pll_p, 0, RK2928_PLL_CON(0), mux_pll_p 160 drivers/clk/rockchip/clk-rk3128.c [dpll] = PLL(pll_rk3036, PLL_DPLL, "dpll", mux_pll_p, 0, RK2928_PLL_CON(4), mux_pll_p 162 drivers/clk/rockchip/clk-rk3128.c [cpll] = PLL(pll_rk3036, PLL_CPLL, "cpll", mux_pll_p, 0, RK2928_PLL_CON(8), mux_pll_p 164 drivers/clk/rockchip/clk-rk3128.c [gpll] = PLL(pll_rk3036, PLL_GPLL, "gpll", mux_pll_p, 0, RK2928_PLL_CON(12), mux_pll_p 196 drivers/clk/rockchip/clk-rk3188.c PNAME(mux_pll_p) = { "xin24m", "xin32k" }; mux_pll_p 214 drivers/clk/rockchip/clk-rk3188.c [apll] = PLL(pll_rk3066, PLL_APLL, "apll", mux_pll_p, 0, RK2928_PLL_CON(0), mux_pll_p 216 drivers/clk/rockchip/clk-rk3188.c [dpll] = PLL(pll_rk3066, PLL_DPLL, "dpll", mux_pll_p, 0, RK2928_PLL_CON(4), mux_pll_p 218 drivers/clk/rockchip/clk-rk3188.c [cpll] = PLL(pll_rk3066, PLL_CPLL, "cpll", mux_pll_p, 0, RK2928_PLL_CON(8), mux_pll_p 220 drivers/clk/rockchip/clk-rk3188.c [gpll] = PLL(pll_rk3066, PLL_GPLL, "gpll", mux_pll_p, 0, RK2928_PLL_CON(12), mux_pll_p 225 drivers/clk/rockchip/clk-rk3188.c [apll] = PLL(pll_rk3066, PLL_APLL, "apll", mux_pll_p, 0, RK2928_PLL_CON(0), mux_pll_p 227 drivers/clk/rockchip/clk-rk3188.c [dpll] = PLL(pll_rk3066, PLL_DPLL, "dpll", mux_pll_p, 0, RK2928_PLL_CON(4), mux_pll_p 229 drivers/clk/rockchip/clk-rk3188.c [cpll] = PLL(pll_rk3066, PLL_CPLL, "cpll", mux_pll_p, 0, RK2928_PLL_CON(8), mux_pll_p 231 drivers/clk/rockchip/clk-rk3188.c [gpll] = PLL(pll_rk3066, PLL_GPLL, "gpll", mux_pll_p, 0, RK2928_PLL_CON(12), mux_pll_p 131 drivers/clk/rockchip/clk-rk3228.c PNAME(mux_pll_p) = { "clk_24m", "xin24m" }; mux_pll_p 168 drivers/clk/rockchip/clk-rk3228.c [apll] = PLL(pll_rk3036, PLL_APLL, "apll", mux_pll_p, 0, RK2928_PLL_CON(0), mux_pll_p 170 drivers/clk/rockchip/clk-rk3228.c [dpll] = PLL(pll_rk3036, PLL_DPLL, "dpll", mux_pll_p, 0, RK2928_PLL_CON(3), mux_pll_p 172 drivers/clk/rockchip/clk-rk3228.c [cpll] = PLL(pll_rk3036, PLL_CPLL, "cpll", mux_pll_p, 0, RK2928_PLL_CON(6), mux_pll_p 174 drivers/clk/rockchip/clk-rk3228.c [gpll] = PLL(pll_rk3036, PLL_GPLL, "gpll", mux_pll_p, 0, RK2928_PLL_CON(9), mux_pll_p 186 drivers/clk/rockchip/clk-rk3288.c PNAME(mux_pll_p) = { "xin24m", "xin32k" }; mux_pll_p 220 drivers/clk/rockchip/clk-rk3288.c [apll] = PLL(pll_rk3066, PLL_APLL, "apll", mux_pll_p, 0, RK3288_PLL_CON(0), mux_pll_p 222 drivers/clk/rockchip/clk-rk3288.c [dpll] = PLL(pll_rk3066, PLL_DPLL, "dpll", mux_pll_p, 0, RK3288_PLL_CON(4), mux_pll_p 224 drivers/clk/rockchip/clk-rk3288.c [cpll] = PLL(pll_rk3066, PLL_CPLL, "cpll", mux_pll_p, 0, RK3288_PLL_CON(8), mux_pll_p 226 drivers/clk/rockchip/clk-rk3288.c [gpll] = PLL(pll_rk3066, PLL_GPLL, "gpll", mux_pll_p, 0, RK3288_PLL_CON(12), mux_pll_p 228 drivers/clk/rockchip/clk-rk3288.c [npll] = PLL(pll_rk3066, PLL_NPLL, "npll", mux_pll_p, 0, RK3288_PLL_CON(16), mux_pll_p 121 drivers/clk/rockchip/clk-rk3308.c PNAME(mux_pll_p) = { "xin24m" }; mux_pll_p 180 drivers/clk/rockchip/clk-rk3308.c [apll] = PLL(pll_rk3328, PLL_APLL, "apll", mux_pll_p, mux_pll_p 183 drivers/clk/rockchip/clk-rk3308.c [dpll] = PLL(pll_rk3328, PLL_DPLL, "dpll", mux_pll_p, mux_pll_p 186 drivers/clk/rockchip/clk-rk3308.c [vpll0] = PLL(pll_rk3328, PLL_VPLL0, "vpll0", mux_pll_p, mux_pll_p 189 drivers/clk/rockchip/clk-rk3308.c [vpll1] = PLL(pll_rk3328, PLL_VPLL1, "vpll1", mux_pll_p, mux_pll_p 142 drivers/clk/rockchip/clk-rk3328.c PNAME(mux_pll_p) = { "xin24m" }; mux_pll_p 214 drivers/clk/rockchip/clk-rk3328.c [apll] = PLL(pll_rk3328, PLL_APLL, "apll", mux_pll_p, mux_pll_p 217 drivers/clk/rockchip/clk-rk3328.c [dpll] = PLL(pll_rk3328, PLL_DPLL, "dpll", mux_pll_p, mux_pll_p 220 drivers/clk/rockchip/clk-rk3328.c [cpll] = PLL(pll_rk3328, PLL_CPLL, "cpll", mux_pll_p, mux_pll_p 223 drivers/clk/rockchip/clk-rk3328.c [gpll] = PLL(pll_rk3328, PLL_GPLL, "gpll", mux_pll_p, mux_pll_p 226 drivers/clk/rockchip/clk-rk3328.c [npll] = PLL(pll_rk3328, PLL_NPLL, "npll", mux_pll_p, mux_pll_p 90 drivers/clk/rockchip/clk-rk3368.c PNAME(mux_pll_p) = { "xin24m", "xin32k" }; mux_pll_p 130 drivers/clk/rockchip/clk-rk3368.c [apllb] = PLL(pll_rk3066, PLL_APLLB, "apllb", mux_pll_p, 0, RK3368_PLL_CON(0), mux_pll_p 132 drivers/clk/rockchip/clk-rk3368.c [aplll] = PLL(pll_rk3066, PLL_APLLL, "aplll", mux_pll_p, 0, RK3368_PLL_CON(4), mux_pll_p 134 drivers/clk/rockchip/clk-rk3368.c [dpll] = PLL(pll_rk3066, PLL_DPLL, "dpll", mux_pll_p, 0, RK3368_PLL_CON(8), mux_pll_p 136 drivers/clk/rockchip/clk-rk3368.c [cpll] = PLL(pll_rk3066, PLL_CPLL, "cpll", mux_pll_p, 0, RK3368_PLL_CON(12), mux_pll_p 138 drivers/clk/rockchip/clk-rk3368.c [gpll] = PLL(pll_rk3066, PLL_GPLL, "gpll", mux_pll_p, 0, RK3368_PLL_CON(16), mux_pll_p 140 drivers/clk/rockchip/clk-rk3368.c [npll] = PLL(pll_rk3066, PLL_NPLL, "npll", mux_pll_p, 0, RK3368_PLL_CON(20), mux_pll_p 107 drivers/clk/rockchip/clk-rk3399.c PNAME(mux_pll_p) = { "xin24m", "xin32k" }; mux_pll_p 217 drivers/clk/rockchip/clk-rk3399.c [lpll] = PLL(pll_rk3399, PLL_APLLL, "lpll", mux_pll_p, 0, RK3399_PLL_CON(0), mux_pll_p 219 drivers/clk/rockchip/clk-rk3399.c [bpll] = PLL(pll_rk3399, PLL_APLLB, "bpll", mux_pll_p, 0, RK3399_PLL_CON(8), mux_pll_p 221 drivers/clk/rockchip/clk-rk3399.c [dpll] = PLL(pll_rk3399, PLL_DPLL, "dpll", mux_pll_p, 0, RK3399_PLL_CON(16), mux_pll_p 223 drivers/clk/rockchip/clk-rk3399.c [cpll] = PLL(pll_rk3399, PLL_CPLL, "cpll", mux_pll_p, 0, RK3399_PLL_CON(24), mux_pll_p 225 drivers/clk/rockchip/clk-rk3399.c [gpll] = PLL(pll_rk3399, PLL_GPLL, "gpll", mux_pll_p, 0, RK3399_PLL_CON(32), mux_pll_p 227 drivers/clk/rockchip/clk-rk3399.c [npll] = PLL(pll_rk3399, PLL_NPLL, "npll", mux_pll_p, 0, RK3399_PLL_CON(40), mux_pll_p 229 drivers/clk/rockchip/clk-rk3399.c [vpll] = PLL(pll_rk3399, PLL_VPLL, "vpll", mux_pll_p, 0, RK3399_PLL_CON(48), mux_pll_p 234 drivers/clk/rockchip/clk-rk3399.c [ppll] = PLL(pll_rk3399, PLL_PPLL, "ppll", mux_pll_p, 0, RK3399_PMU_PLL_CON(0), mux_pll_p 440 drivers/clk/rockchip/clk-rk3399.c COMPOSITE(SCLK_USB3OTG0_SUSPEND, "clk_usb3otg0_suspend", mux_pll_p, 0, mux_pll_p 444 drivers/clk/rockchip/clk-rk3399.c COMPOSITE(SCLK_USB3OTG1_SUSPEND, "clk_usb3otg1_suspend", mux_pll_p, 0, mux_pll_p 448 drivers/clk/rockchip/clk-rk3399.c COMPOSITE(SCLK_UPHY0_TCPDPHY_REF, "clk_uphy0_tcpdphy_ref", mux_pll_p, 0, mux_pll_p 456 drivers/clk/rockchip/clk-rk3399.c COMPOSITE(SCLK_UPHY1_TCPDPHY_REF, "clk_uphy1_tcpdphy_ref", mux_pll_p, 0, mux_pll_p 1055 drivers/clk/rockchip/clk-rk3399.c COMPOSITE(SCLK_TSADC, "clk_tsadc", mux_pll_p, 0, mux_pll_p 1139 drivers/clk/rockchip/clk-rk3399.c COMPOSITE(SCLK_HDMI_CEC, "clk_hdmi_cec", mux_pll_p, 0, mux_pll_p 1421 drivers/clk/rockchip/clk-rk3399.c MUX(0, "clk_timer_src_pmu", mux_pll_p, CLK_IGNORE_UNUSED, mux_pll_p 118 drivers/clk/rockchip/clk-rv1108.c PNAME(mux_pll_p) = { "xin24m", "xin24m"}; mux_pll_p 153 drivers/clk/rockchip/clk-rv1108.c [apll] = PLL(pll_rk3399, PLL_APLL, "apll", mux_pll_p, 0, RV1108_PLL_CON(0), mux_pll_p 155 drivers/clk/rockchip/clk-rv1108.c [dpll] = PLL(pll_rk3399, PLL_DPLL, "dpll", mux_pll_p, 0, RV1108_PLL_CON(8), mux_pll_p 157 drivers/clk/rockchip/clk-rv1108.c [gpll] = PLL(pll_rk3399, PLL_GPLL, "gpll", mux_pll_p, 0, RV1108_PLL_CON(16),