mux_dpll_vpll0_vpll1_xin24m_p  127 drivers/clk/rockchip/clk-rk3308.c PNAME(mux_dpll_vpll0_vpll1_xin24m_p)	= { "dpll", "vpll0", "vpll1", "xin24m" };
mux_dpll_vpll0_vpll1_xin24m_p  487 drivers/clk/rockchip/clk-rk3308.c 	COMPOSITE(SCLK_SDMMC_DIV, "clk_sdmmc_div", mux_dpll_vpll0_vpll1_xin24m_p, CLK_IGNORE_UNUSED,
mux_dpll_vpll0_vpll1_xin24m_p  490 drivers/clk/rockchip/clk-rk3308.c 	COMPOSITE(SCLK_SDMMC_DIV50, "clk_sdmmc_div50", mux_dpll_vpll0_vpll1_xin24m_p, CLK_IGNORE_UNUSED,
mux_dpll_vpll0_vpll1_xin24m_p  499 drivers/clk/rockchip/clk-rk3308.c 	COMPOSITE(SCLK_SDIO_DIV, "clk_sdio_div", mux_dpll_vpll0_vpll1_xin24m_p, CLK_IGNORE_UNUSED,
mux_dpll_vpll0_vpll1_xin24m_p  502 drivers/clk/rockchip/clk-rk3308.c 	COMPOSITE(SCLK_SDIO_DIV50, "clk_sdio_div50", mux_dpll_vpll0_vpll1_xin24m_p, CLK_IGNORE_UNUSED,
mux_dpll_vpll0_vpll1_xin24m_p  511 drivers/clk/rockchip/clk-rk3308.c 	COMPOSITE(SCLK_EMMC_DIV, "clk_emmc_div", mux_dpll_vpll0_vpll1_xin24m_p, CLK_IGNORE_UNUSED,
mux_dpll_vpll0_vpll1_xin24m_p  514 drivers/clk/rockchip/clk-rk3308.c 	COMPOSITE(SCLK_EMMC_DIV50, "clk_emmc_div50", mux_dpll_vpll0_vpll1_xin24m_p, CLK_IGNORE_UNUSED,